公开(公告)号：US20050181233A1

公开(公告)日：2005-08-18

申请号：US11037099

申请日：2005-01-19

申请人： Byung-Hee Sohn ,  Hyun-Ju Lim

发明人： Byung-Hee Sohn ,  Hyun-Ju Lim

IPC分类号： H01L51/50 ,  C08G61/02 ,  C08G61/12 ,  C08G75/00 ,  C09K11/06 ,  H01L51/00 ,  H05B33/14

CPC分类号： C09K11/06 ,  C08G61/02 ,  C08G61/124 ,  C08G61/126 ,  C09K2211/1483 ,  H01L51/0036 ,  H01L51/0039 ,  H01L51/0043 ,  H01L51/5012 ,  H05B33/14 ,  Y10S428/917

摘要： A thieno[3,2-b]indole-based polymer and an organo-electroluminescent device in which the polymer is introduced into an organic layer are provided. The thieno[3,2-b]indole-based polymer may be easily prepared and has blue light-emitting characteristic. The organo-electroluminescent device adopting the organic layer using the thieno[3,2-b]indole-based polymer has improved color purity, efficiency, and luminance characteristics.

摘要翻译： 提供噻吩并[3,2-b]吲哚基聚合物和其中将聚合物引入有机层中的有机电致发光器件。 噻吩并[3,2-b]吲哚基聚合物可以容易地制备并具有蓝色发光特性。 采用噻吩并[3,2-b]吲哚类聚合物的有机层的有机电致发光元件具有提高的色纯度，效率和亮度特性。

公开(公告)号：US08043932B2

公开(公告)日：2011-10-25

申请号：US11847679

申请日：2007-08-30

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L21/76

CPC分类号： H01L21/76232 ,  Y10S148/05

摘要： A method of fabricating a semiconductor device including at least one of the following steps: forming an oxide layer on and/or over a silicon substrate. Forming a first photoresist pattern on and/or over the oxide layer. Forming a trench by etching the oxide layer and the substrate using the first photoresist pattern as a mask. Removing the first photoresist pattern. Filling the trench with a trench oxide layer. Planarizing the trench oxide layer. Forming an etch stop layer on and/or over the trench oxide layer. Forming a second photoresist pattern on and/or over the etch stop layer. Etching the etch stop layer and the trench oxide layer using the second photoresist pattern as an etch mask. Removing the second photoresist pattern and the etch stop layer.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤中的至少一个：在硅衬底上和/或之上形成氧化物层。 在氧化物层上和/或上方形成第一光致抗蚀剂图案。 通过使用第一光致抗蚀剂图案作为掩模蚀刻氧化物层和基板来形成沟槽。 去除第一光致抗蚀剂图案。 用沟槽氧化层填充沟槽。 平面化沟槽氧化层。 在沟槽氧化物层上和/或上方形成蚀刻停止层。 在蚀刻停止层上和/或上方形成第二光致抗蚀剂图案。 使用第二光致抗蚀剂图案蚀刻蚀刻停止层和沟槽氧化物层作为蚀刻掩模。 去除第二光致抗蚀剂图案和蚀刻停止层。

公开(公告)号：US07737516B2

公开(公告)日：2010-06-15

申请号：US11844609

申请日：2007-08-24

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L31/0232

CPC分类号： H01L27/14634 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14645

摘要： Embodiments relate to an image sensor and a method for manufacturing an image sensor. According to embodiments, a transistor structure may be manufactured on a semiconductor substrate, and an insulating layer covering the transistor structure may be formed. The insulating layer may be patterned to form a first via that may expose the semiconductor substrate, and a silicon layer may be formed on the first via and the insulating layer. The silicon layer and the insulating layer may be patterned to form a second via exposing the transistor structure, and the second via may be filled with metal to form a connecting line electrically connected with the transistor structure. Conductive impurities may be implanted into the silicon layer and may form a light receiving portion connected with the connecting line.

摘要翻译： 实施例涉及图像传感器和图像传感器的制造方法。 根据实施例，可以在半导体衬底上制造晶体管结构，并且可以形成覆盖晶体管结构的绝缘层。 绝缘层可以被图案化以形成可露出半导体衬底的第一通孔，并且硅层可以形成在第一通孔和绝缘层上。 硅层和绝缘层可以被图案化以形成暴露晶体管结构的第二通孔，并且第二通孔可以用金属填充以形成与晶体管结构电连接的连接线。 可以将导电杂质注入到硅层中，并且可以形成与连接线连接的光接收部分。

公开(公告)号：US07883952B2

公开(公告)日：2011-02-08

申请号：US12146486

申请日：2008-06-26

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L21/8238

CPC分类号： H01L27/11534 ,  H01L27/105 ,  H01L27/11526 ,  H01L29/66825 ,  H01L29/7883

摘要： A method of manufacturing a flash memory device that prevents generation of voids when forming an interlayer dielectric film. The method may include forming a gate on a semiconductor substrate, and then sequentially stacking a first dielectric film and a second dielectric film on the semiconductor substrate, and then forming a first spacer comprising a first dielectric film pattern and a second dielectric film pattern on sidewalls of the gate by performing a first etching process, and then forming source and drain areas in the semiconductor substrate, and then removing the second dielectric film, and then sequentially stacking a third dielectric film and a fourth dielectric film on the semiconductor substrate, and then forming a second spacer comprising the first dielectric pattern and a third dielectric pattern on the sidewalls of the gate by performing a second etching process, and then forming an interlayer dielectric film on the semiconductor substrate including the gate and the first spacer.

摘要翻译： 一种在形成层间电介质膜时防止产生空隙的闪速存储器件的制造方法。 该方法可以包括在半导体衬底上形成栅极，然后在半导体衬底上依次层叠第一电介质膜和第二电介质膜，然后在侧壁上形成包括第一电介质膜图案和第二电介质膜图案的第一间隔物 通过进行第一蚀刻处理，然后在半导体衬底中形成源极和漏极区域，然后去除第二电介质膜，然后在半导体衬底上依次堆叠第三电介质膜和第四电介质膜，然后 通过执行第二蚀刻工艺，在栅极的侧壁上形成包括第一电介质图案和第三电介质图案的第二间隔物，然后在包括栅极和第一间隔物的半导体衬底上形成层间电介质膜。

公开(公告)号：US07745304B2

公开(公告)日：2010-06-29

申请号：US12140817

申请日：2008-06-17

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L21/762

CPC分类号： H01L21/7621 ,  H01L21/76232

摘要： A method of manufacturing a semiconductor device begins when a first dielectric pattern is formed on and/or over a substrate, and a first etching process is performed to form a trench in the substrate. An edge portion of the first trench is exposed. An oxidation process is performed on and/or over the substrate rounding the edge portion of the trench. A second dielectric is formed on and/or over the substrate including the trench, and a planarization process is performed on the second dielectric. A photoresist pattern is formed on and/or over the second dielectric corresponding to the trench, and a second etching process is performed to form a second dielectric pattern filling the trench. The photoresist pattern is removed. A second cleaning process is performed on the substrate including the trench to form a device isolation layer, which is formed by removing a portion of the second dielectric pattern. A portion of the second dielectric remains on the first dielectric pattern after the performing of the planarization process on the second dielectric.

摘要翻译： 当在衬底上和/或衬底上形成第一电介质图案时，开始制造半导体器件的方法，并且执行第一蚀刻工艺以在衬底中形成沟槽。 暴露第一沟槽的边缘部分。 在围绕沟槽的边缘部分的基底上和/或上方进行氧化处理。 在包括沟槽的衬底上和/或上方形成第二电介质，并且在第二电介质上进行平坦化处理。 在对应于沟槽的第二电介质上和/或上方形成光致抗蚀剂图案，并且执行第二蚀刻工艺以形成填充沟槽的第二电介质图案。 去除光致抗蚀剂图案。 在包括沟槽的衬底上进行第二清洁处理，以形成通过去除第二电介质图案的一部分而形成的器件隔离层。 在对第二电介质进行平坦化处理之后，第二电介质的一部分保留在第一电介质图案上。

公开(公告)号：US07541736B2

公开(公告)日：2009-06-02

申请号：US11037099

申请日：2005-01-19

申请人： Byung-Hee Sohn ,  Hyun-Ju Lim

发明人： Byung-Hee Sohn ,  Hyun-Ju Lim

IPC分类号： H01L51/54 ,  H05B33/14 ,  C09K11/06 ,  C08F234/04 ,  C08F34/04 ,  C08F32/06

CPC分类号： C09K11/06 ,  C08G61/02 ,  C08G61/124 ,  C08G61/126 ,  C09K2211/1483 ,  H01L51/0036 ,  H01L51/0039 ,  H01L51/0043 ,  H01L51/5012 ,  H05B33/14 ,  Y10S428/917

摘要： A thieno[3,2-b]indole-based polymer and an organo-electroluminescent device in which the polymer is introduced into an organic layer are provided. The thieno[3,2-b]indole-based polymer may be easily prepared and has blue light-emitting characteristic. The organo-electroluminescent device adopting the organic layer using the thieno[3,2-b]indole-based polymer has improved color purity, efficiency, and luminance characteristics.

摘要翻译： 提供噻吩并[3,2-b]吲哚基聚合物和其中将聚合物引入有机层中的有机电致发光器件。 噻吩并[3,2-b]吲哚基聚合物可以容易地制备并具有蓝色发光特性。 采用噻吩并[3,2-b]吲哚类聚合物的有机层的有机电致发光元件具有提高的色纯度，效率和亮度特性。

公开(公告)号：US20090004795A1

公开(公告)日：2009-01-01

申请号：US12146486

申请日：2008-06-26

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L21/336

CPC分类号： H01L27/11534 ,  H01L27/105 ,  H01L27/11526 ,  H01L29/66825 ,  H01L29/7883

摘要： A method of manufacturing a flash memory device that prevents generation of voids when forming an interlayer dielectric film. The method may include forming a gate on a semiconductor substrate, and then sequentially stacking a first dielectric film and a second dielectric film on the semiconductor substrate, and then forming a first spacer comprising a first dielectric film pattern and a second dielectric film pattern on sidewalls of the gate by performing a first etching process, and then forming source and drain areas in the semiconductor substrate, and then removing the second dielectric film, and then sequentially stacking a third dielectric film and a fourth dielectric film on the semiconductor substrate, and then forming a second spacer comprising the first dielectric pattern and a third dielectric pattern on the sidewalls of the gate by performing a second etching process, and then forming an interlayer dielectric film on the semiconductor substrate including the gate and the first spacer.

摘要翻译： 一种在形成层间电介质膜时防止产生空隙的闪速存储器件的制造方法。 该方法可以包括在半导体衬底上形成栅极，然后在半导体衬底上依次层叠第一电介质膜和第二电介质膜，然后在侧壁上形成包括第一电介质膜图案和第二电介质膜图案的第一间隔物 通过进行第一蚀刻处理，然后在半导体衬底中形成源极和漏极区域，然后去除第二电介质膜，然后在半导体衬底上依次堆叠第三电介质膜和第四电介质膜，然后 通过执行第二蚀刻工艺，在栅极的侧壁上形成包括第一电介质图案和第三电介质图案的第二间隔物，然后在包括栅极和第一间隔物的半导体衬底上形成层间电介质膜。

公开(公告)号：US20080315352A1

公开(公告)日：2008-12-25

申请号：US12140817

申请日：2008-06-17

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L29/06 ,  H01L21/762

CPC分类号： H01L21/7621 ,  H01L21/76232

摘要： A method of manufacturing a semiconductor device begins when a first dielectric pattern is formed on and/or over a substrate, and a first etching process is performed to form a trench in the substrate. An edge portion of the first trench is exposed. An oxidation process is performed on and/or over the substrate rounding the edge portion of the trench. A second dielectric is formed on and/or over the substrate including the trench, and a planarization process is performed on the second dielectric. A photoresist pattern is formed on and/or over the second dielectric corresponding to the trench, and a second etching process is performed to form a second dielectric pattern filling the trench. The photoresist pattern is removed. A second cleaning process is performed on the substrate including the trench to form a device isolation layer, which is formed by removing a portion of the second dielectric pattern. A portion of the second dielectric remains on the first dielectric pattern after the performing of the planarization process on the second dielectric.

摘要翻译： 当在衬底上和/或衬底上形成第一电介质图案时，开始制造半导体器件的方法，并且执行第一蚀刻工艺以在衬底中形成沟槽。 暴露第一沟槽的边缘部分。 在围绕沟槽的边缘部分的基底上和/或上方进行氧化处理。 在包括沟槽的衬底上和/或上方形成第二电介质，并且在第二电介质上进行平坦化处理。 在对应于沟槽的第二电介质上和/或上方形成光致抗蚀剂图案，并且执行第二蚀刻工艺以形成填充沟槽的第二电介质图案。 去除光致抗蚀剂图案。 在包括沟槽的衬底上进行第二清洁处理，以形成通过去除第二电介质图案的一部分而形成的器件隔离层。 在对第二电介质进行平坦化处理之后，第二电介质的一部分保留在第一电介质图案上。

公开(公告)号：US20080099865A1

公开(公告)日：2008-05-01

申请号：US11844609

申请日：2007-08-24

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/14634 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14645

摘要： Embodiments relate to an image sensor and a method for manufacturing an image sensor. According to embodiments, a transistor structure may be manufactured on a semiconductor substrate, and an insulating layer covering the transistor structure may be formed. The insulating layer may be patterned to form a first via that may expose the semiconductor substrate, and a silicon layer may be formed on the first via and the insulating layer. The silicon layer and the insulating layer may be patterned to form a second via exposing the transistor structure, and the second via may be filled with metal to form a connecting line electrically connected with the transistor structure. Conductive impurities may be implanted into the silicon layer and may form a light receiving portion connected with the connecting line.

摘要翻译： 实施例涉及图像传感器和图像传感器的制造方法。 根据实施例，可以在半导体衬底上制造晶体管结构，并且可以形成覆盖晶体管结构的绝缘层。 绝缘层可以被图案化以形成可露出半导体衬底的第一通孔，并且硅层可以形成在第一通孔和绝缘层上。 硅层和绝缘层可以被图案化以形成暴露晶体管结构的第二通孔，并且第二通孔可以用金属填充以形成与晶体管结构电连接的连接线。 可以将导电杂质注入到硅层中，并且可以形成与连接线连接的光接收部分。

公开(公告)号：US20080057721A1

公开(公告)日：2008-03-06

申请号：US11847679

申请日：2007-08-30

申请人： Hyun-Ju Lim

发明人： Hyun-Ju Lim

IPC分类号： H01L21/311

CPC分类号： H01L21/76232 ,  Y10S148/05

摘要： A method of fabricating a semiconductor device including at least one of the following steps: forming an oxide layer on and/or over a silicon substrate. Forming a first photoresist pattern on and/or over the oxide layer. Forming a trench by etching the oxide layer and the substrate using the first photoresist pattern as a mask. Removing the first photoresist pattern. Filling the trench with a trench oxide layer. Planarizing the trench oxide layer. Forming an etch stop layer on and/or over the trench oxide layer. Forming a second photoresist pattern on and/or over the etch stop layer. Etching the etch stop layer and the trench oxide layer using the second photoresist pattern as an etch mask. Removing the second photoresist pattern and the etch stop layer.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤中的至少一个：在硅衬底上和/或之上形成氧化物层。 在氧化物层上和/或上方形成第一光致抗蚀剂图案。 通过使用第一光致抗蚀剂图案作为掩模蚀刻氧化物层和基板来形成沟槽。 去除第一光致抗蚀剂图案。 用沟槽氧化层填充沟槽。 平面化沟槽氧化层。 在沟槽氧化物层上和/或上方形成蚀刻停止层。 在蚀刻停止层上和/或上方形成第二光致抗蚀剂图案。 使用第二光致抗蚀剂图案蚀刻蚀刻停止层和沟槽氧化物层作为蚀刻掩模。 去除第二光致抗蚀剂图案和蚀刻停止层。