公开(公告)号：US20220165653A1

公开(公告)日：2022-05-26

申请号：US17452123

申请日：2021-10-25

申请人： IBIDEN CO., LTD.

发明人： Katsuyuki SANO ,  Yoji SAWADA

IPC分类号： H01L23/498 ,  H01L21/48

摘要： A wiring substrate includes a conductor pad, an insulating layer formed on the conductor pad such that the insulating layer is covering the conductor pad and has a through hole, a bump formed on the conductor pad such that the bump is formed in the through hole penetrating through the insulating layer. The conductor pad is formed such that the conductor pad has a connecting surface connected to the bump, a concave part formed on the connecting surface of the conductor pad to the bump, and a convex part formed in the concave part.

公开(公告)号：US20190198446A1

公开(公告)日：2019-06-27

申请号：US16232144

申请日：2018-12-26

申请人： IBIDEN CO., LTD.

发明人： Yoji SAWADA

IPC分类号： H01L23/538 ,  H01L25/18 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/5386 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16238

摘要： A printed wiring board includes a core substrate, and a build-up layer formed on the substrate. The substrate includes core material, third conductor layer, fourth conductor layer, and through-hole conductors. The build-up layer is formed on the core material and third conductor layer and includes insulating layers, first conductor layers, and via conductors. The build-up layer has central area and outer peripheral area such that the via conductors include central area via conductors and outer peripheral area via conductors, diameter of central area via conductor is smaller than diameter of outer peripheral area via conductor, the outermost first conductor layer includes first pads to mount first electronic component and second pads to mount second electronic component, the first and second pads are connected to each other via the central via conductors, and the lowermost insulating layer does not have the via conductors in the central area of the build-up layer.

公开(公告)号：US20220013448A1

公开(公告)日：2022-01-13

申请号：US17359887

申请日：2021-06-28

申请人： IBIDEN CO., LTD.

发明人： Isao OHNO ,  Tomoya DAIZO ,  Yoji SAWADA ,  Kazuhiko KURANOBU

IPC分类号： H01L23/498 ,  H01L21/48

摘要： A wiring substrate includes a resin insulating layer, a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer, a conductor pad formed on the resin insulating layer and connected to the via conductor, a coating insulating layer formed on the resin insulating layer such that the coating insulating layer is covering the conductor pad, and a metal post formed on the conductor pad and protruding from the coating insulating layer. The conductor pad is formed such that a central axis of the conductor pad is shifted in a predetermined direction with respect to a central axis of the via conductor, and the metal post is formed such that a central axis of the metal post is shifted in the predetermined direction with respect to the central axis of the conductor pad.

公开(公告)号：US20220015234A1

公开(公告)日：2022-01-13

申请号：US17359805

申请日：2021-06-28

申请人： IBIDEN CO., LTD.

发明人： Isao OHNO ,  Tomoya DAIZO ,  Yoji SAWADA ,  Kazuhiko KURANOBU

IPC分类号： H05K1/11 ,  H05K1/09 ,  H01L23/498 ,  H01L23/00

摘要： A wiring substrate includes a resin insulating layer, a conductor pad formed on the resin insulating layer, a coating insulating layer formed on the resin insulating layer such that the coating insulating layer is covering the conductor pad, and a metal post connected to the conductor pad and protruding from the coating insulating layer such that a gap is formed between the metal post and the conductor pad at a peripheral edge of the metal post. The coating insulating layer is formed such that the coating insulating layer has an interposed portion formed in the gap between the metal post and the conductor pad at the peripheral edge of the metal post.

公开(公告)号：US20210068265A1

公开(公告)日：2021-03-04

申请号：US17004812

申请日：2020-08-27

申请人： IBIDEN CO., LTD.

发明人： Yoji SAWADA ,  Shuto Iwata

IPC分类号： H05K3/34 ,  H05K3/12 ,  H05K1/11 ,  H05K3/42

摘要： A printed wiring board includes an insulating layer, a conductor layer formed on the insulating layer and including first and second pads, a solder resist layer formed on the insulating layer, covering the conductor layer and exposing the first and second pads to form the second pad having diameter smaller than diameter of the first pad, a first bump formed on the first pad and including first base and top plating layers such that the first base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion, and a second bump formed on the second pad and including second base and top plating layers such that the second base layer has embedded portion in the resist layer and exposed portion and having diameter substantially equal to or smaller than diameter of the embedded portion.

公开(公告)号：US20220013455A1

公开(公告)日：2022-01-13

申请号：US17361460

申请日：2021-06-29

申请人： IBIDEN CO., LTD.

发明人： Isao OHNO ,  Tomoya DAIZO ,  Yoji SAWADA ,  Kazuhiko KURANOBU

IPC分类号： H01L23/522 ,  H01L23/00 ,  H01L21/768

摘要： A wiring substrate includes a resin insulating layer, a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer, a conductor pad formed on the resin insulating layer and connected to the via conductor, a coating insulating layer formed on the resin insulating layer such that the coating insulating layer is covering the conductor pad, and a metal post formed on the conductor pad and protruding from the coating insulating layer. The via conductor is formed such that the via conductor is increased in diameter toward the conductor pad, and the metal post is formed such that the metal post is increased in diameter toward the conductor pad.

公开(公告)号：US20220013409A1

公开(公告)日：2022-01-13

申请号：US17361522

申请日：2021-06-29

申请人： IBIDEN CO., LTD.

发明人： Isao OHNO ,  Tomoya DAIZO ,  Yoji SAWADA ,  Kazuhiko KURANOBU

IPC分类号： H01L21/768

摘要： A method for manufacturing a wiring substrate includes forming multiple conductor pads on an insulating layer such that the conductor pads include multiple first conductor pads and multiple second conductor pads, forming multiple protruding parts on surfaces of the first conductor pads of the conductor pads, respectively, forming a resin layer such that the resin layer covers the insulating layer and the conductor pads, exposing, from the resin layer, end portions of the protruding parts on the opposite side with respect to the insulating layer, forming, in the resin layer, multiple openings such that the openings expose surfaces of the second conductor pads of the conductor pads, respectively; and forming a coating film on the surfaces of the second conductor pads exposed in the openings.