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公开(公告)号:US20230386987A1
公开(公告)日:2023-11-30
申请号:US18321210
申请日:2023-05-22
申请人: IDEAL POWER INC.
发明人: Jiankang BU , Robert Daniel BRDAR
IPC分类号: H01L23/498 , H01L23/373 , H01L23/00 , H01L25/065 , H01L25/11
CPC分类号: H01L23/49833 , H01L23/3735 , H01L24/29 , H01L25/0655 , H01L24/32 , H01L24/33 , H01L25/117 , H01L25/115 , H01L24/83 , H01L2224/29139 , H01L2224/32225 , H01L2224/33181 , H01L23/3121
摘要: A double-sided cooling package for a double-sided, bi-directional junction transistor can include a double-sided, bi-directional, junction transistor chip with an individual, double-sided, bi-directional power switch (collectively, a DSTA). The DSTA can be sandwiched between heat sinks. Each heat sink can include a direct plating copper (DPC) structure, a direct copper bonding (DCB) structure or a direct aluminum bond (DAB) structure. In addition, each heat sink can have opposed first and second copper layers on a substrate, and copper contacts that extend from a respective second copper layer through vias in each substrate to an exterior of the cooling package.
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公开(公告)号:US20240113210A1
公开(公告)日:2024-04-04
申请号:US18539959
申请日:2023-12-14
申请人: IDEAL POWER INC.
IPC分类号: H01L29/747 , H01L29/08 , H01L29/10 , H01L29/66
CPC分类号: H01L29/747 , H01L29/083 , H01L29/1012 , H01L29/66386
摘要: Bi-directional trench power switches. At least one example is a semiconductor device comprising: an upper base region associated with a first side of a substrate of semiconductor material; an upper-CE trench defined on the first side, the upper-CE trench defines a proximal opening at the first side and a distal end within the substrate; an upper collector-emitter region disposed at the distal end of the upper-CE trench; a lower base region associated with a second side of substrate; and a lower collector-emitter region associated with the second side.
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公开(公告)号:US20230048984A1
公开(公告)日:2023-02-16
申请号:US17884803
申请日:2022-08-10
申请人: IDEAL POWER INC.
IPC分类号: H01L29/747 , H01L29/08 , H01L29/10 , H01L29/66
摘要: Bi-directional trench power switches. At least one example is a semiconductor device comprising: an upper base region associated with a first side of a substrate of semiconductor material; an upper-CE trench defined on the first side, the upper-CE trench defines a proximal opening at the first side and a distal end within the substrate; an upper collector-emitter region disposed at the distal end of the upper-CE trench; a lower base region associated with a second side of substrate; and a lower collector-emitter region associated with the second side.
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