公开(公告)号：US20240188457A1

公开(公告)日：2024-06-06

申请号：US18527152

申请日：2023-12-01

申请人： IMEC VZW ,  Katholieke Universiteit Leuven

发明人： Sergiu CLIMA ,  Taras RAVSHER ,  Geoffrey POURTOIS

IPC分类号： H10N70/00 ,  H10B63/00 ,  H10N70/20

CPC分类号： H10N70/8828 ,  H10B63/24 ,  H10N70/023 ,  H10N70/026 ,  H10N70/20

摘要： In one aspect, a device includes a threshold switch formed of a mixture. The mixture includes at least 0.90 parts by mole of a composition of three or four chemical elements of: from 0.20 to 0.70 parts by mole of Si, from 0.05 to 0.60 parts by mole of Te, and from 0.05 to 0.60 parts by mole of S, P, or a mixture of S and P. The mixture also includes at most 0.10 parts by mole of optional other chemical elements different from Si, Te, S, and P. The parts by mole of the mixture add up to 1.00.

公开(公告)号：US20240188456A1

公开(公告)日：2024-06-06

申请号：US18527116

申请日：2023-12-01

申请人： IMEC VZW ,  Katholieke Universiteit Leuven

发明人： Sergiu CLIMA ,  Taras RAVSHER ,  Geoffrey POURTOIS

IPC分类号： H10N70/00 ,  H10B63/00

CPC分类号： H10N70/8822 ,  H10B63/24 ,  H10N70/023 ,  H10N70/026 ,  H10N70/8825

摘要： In one aspect, a device includes a threshold switch formed of a mixture. The mixture includes a composition of three chemical elements of: from 0.15 to 0.70 parts by mole of one or two chemical elements selected from Si, Ge, and Sn, from 0.15 to 0.70 parts by mole of S, and optionally from 0.05 to 0.45 parts by mole of one chemical element selected from N, Sb, and P. Each of the three chemical elements is present in an amount of at least 0.05 parts by mole. The mixture also includes at most 0.10 parts by mole of chemical elements different from the three chemical elements. The parts by mole of the mixture add up to 1.00.

公开(公告)号：US20200212205A1

公开(公告)日：2020-07-02

申请号：US16719852

申请日：2019-12-18

申请人： IMEC vzw

发明人： Geert Eneman ,  Bartlomiej PAWLAK ,  Liesbeth WITTERS ,  Geoffrey POURTOIS

IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L21/84 ,  H01L29/161 ,  H01L29/78

摘要： According to one aspect, a method of fabricating a semiconductor structure includes cutting a semiconductor fin extending along a substrate. Cutting the semiconductor fin can comprise forming a fin cut mask. The fin cut mask can define a number of masked regions and a number of cut regions. The method can include cutting the fin into a number of fin parts by etching the fin in the cut regions. The method can further comprise forming an epitaxial semiconductor capping layer on the fin prior to forming the fin cut mask or on the fin parts subsequent to cutting the fin. A capping layer material and a fin material can be lattice mismatched. According to another aspect, a corresponding semiconductor structure comprises fin parts.