公开(公告)号：US20240365688A1

公开(公告)日：2024-10-31

申请号：US18326530

申请日：2023-05-31

申请人： KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

发明人： Shinhyun CHOI ,  See-On PARK ,  Jongmin BAE ,  Hakcheon JEONG ,  Jongyong PARK

IPC分类号： H10N70/20 ,  H10B63/00 ,  H10N70/00

CPC分类号： H10N70/231 ,  H10B63/80 ,  H10N70/826 ,  H10N70/841 ,  H10N70/8833 ,  H10N70/026

摘要： Disclosed are a memory device and a memory apparatus including the memory device. The memory device includes a first electrode, a second electrode spaced apart from the first electrode, and a resistance change layer arranged between the first electrode and the second electrode and doped with a halogen element in a metal oxide having an oxygen content that gradually changes from the second electrode to the first electrode.

公开(公告)号：US20240130257A1

公开(公告)日：2024-04-18

申请号：US18304533

申请日：2023-04-21

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Fu-Hai LI ,  Yi Ching ONG ,  Hsin Heng WANG ,  Tsung-Hao YEH ,  Yu-Wei TING ,  Kuo-Pin CHANG ,  Hung-Ju LI ,  Kuo-Ching HUANG

IPC分类号： H10N70/00 ,  H10N70/20

CPC分类号： H10N70/8613 ,  H10N70/023 ,  H10N70/026 ,  H10N70/231

摘要： Devices and method for forming a switch including a heater layer including a first heater pad, a second heater pad, and a heater line connecting the first heater pad and the second heater pad, a phase change material (PCM) layer positioned in a same vertical plane as the heater line, and a floating spreader layer including a first portion positioned in the same vertical plane as the heater line and the PCM layer, in which the first portion has a first width that is less than or equal to a distance between proximate sidewalls of the first heater pad and the second heater pad.

公开(公告)号：US20240008292A1

公开(公告)日：2024-01-04

申请号：US18299811

申请日：2023-04-13

申请人： Samsung Electronics Co., Ltd.

发明人： Keon Jae Lee ,  Sang Hyun Sung ,  Young Hoon Jung

IPC分类号： H10B63/00 ,  H10B63/10 ,  H10N70/20 ,  H10N70/00 ,  G06N3/063

CPC分类号： H10B63/82 ,  H10B63/10 ,  H10N70/231 ,  H10N70/24 ,  H10N70/841 ,  H10N70/8828 ,  H10N70/883 ,  H10N70/026 ,  G06N3/063

摘要： Disclosed is a neuromorphic memory element, which includes a first electrode; a second electrode; a first thin film layer adjacent to the first electrode between the first electrode and the second electrode and that is configured to emulate a neuronal plasticity by performing a volatile storage function based on a voltage difference between the first electrode and the second electrode; and a second thin film layer between the first thin film layer and the second electrode and that is configured to emulate a synaptic plasticity by performing a non-volatile storage function.

公开(公告)号：US11844294B2

公开(公告)日：2023-12-12

申请号：US17401533

申请日：2021-08-13

申请人： RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY

发明人： Jung Hyun Suk ,  Han Gil Sang ,  SangMyeong Lee ,  Won Bin Kim ,  Jae Myeong Lee ,  Jun Young Kim ,  Oh Young Gong ,  Jin Hyuk Choi

IPC分类号： H10B63/00 ,  H10N70/20 ,  H10N70/00

CPC分类号： H10N70/882 ,  H10B63/82 ,  H10N70/021 ,  H10N70/24 ,  H10N70/821 ,  H10N70/841 ,  H10N70/884 ,  H10N70/8822 ,  H10N70/8825 ,  H10N70/8828 ,  H10N70/026

摘要： A resistance access memory device includes a first electrode, a resistance change layer, formed on the first electrode, comprising a thin film containing BiX13 and and Bi2X2(3-x), and a second electrode formed on the resistance change layer, where X1 is a halogen element selected from the group consisting of F, Cl, Br, I, and combinations thereof, X2 is a chalcogen element selected from the group consisting of S, Se, Te, and combinations thereof, and x is a real number of 0 or more and less than 3.

公开(公告)号：US11744086B2

公开(公告)日：2023-08-29

申请号：US17171622

申请日：2021-02-09

申请人： Micron Technology, Inc.

发明人： David A. Daycock ,  Jonghun Kim

IPC分类号： H10B63/00 ,  H10N70/00

CPC分类号： H10B63/84 ,  H10N70/023 ,  H10N70/026 ,  H10N70/8265 ,  H10N70/881

摘要： A method of forming an electronic device comprises forming a stack structure comprising vertically alternating insulative structures and additional insulative structures, and forming pillars comprising a channel material and at least one dielectric material vertically extending through the stack structure. The method comprises removing the additional insulative structures to form cell openings, forming a first conductive material within a portion of the cell openings, and forming a fill material adjacent to the first conductive material and within the cell openings. The fill material comprises sacrificial portions. The method comprises removing the sacrificial portions of the fill material, and forming a second conductive material within the cell openings in locations previously occupied by the sacrificial portions of the fill material. Related electronic devices, memory devices, and systems are also described.

公开(公告)号：US11723292B2

公开(公告)日：2023-08-08

申请号：US16910609

申请日：2020-06-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Yang Chang ,  Wen-Ting Chu ,  Kuo-Chi Tu ,  Yu-Wen Liao ,  Hsia-Wei Chen ,  Chin-Chieh Yang ,  Sheng-Hung Shih ,  Wen-Chun You

IPC分类号： H10N70/00 ,  H10B63/00 ,  H10N70/20

CPC分类号： H10N70/8265 ,  H10B63/30 ,  H10N70/011 ,  H10N70/063 ,  H10N70/066 ,  H10N70/20 ,  H10N70/24 ,  H10N70/826 ,  H10N70/841 ,  H10N70/8833 ,  H10N70/021 ,  H10N70/023 ,  H10N70/026 ,  H10N70/028 ,  H10N70/041 ,  H10N70/043 ,  H10N70/046 ,  H10N70/061 ,  H10N70/068 ,  H10N70/231 ,  H10N70/235 ,  H10N70/245 ,  H10N70/25 ,  H10N70/253 ,  H10N70/257 ,  H10N70/801 ,  H10N70/821 ,  H10N70/823 ,  H10N70/828 ,  H10N70/8413 ,  H10N70/8416 ,  H10N70/8418 ,  H10N70/8613 ,  H10N70/8616 ,  H10N70/881 ,  H10N70/882 ,  H10N70/883 ,  H10N70/884 ,  H10N70/8822 ,  H10N70/8825 ,  H10N70/8828 ,  H10N70/8836 ,  H10N70/8845

摘要： The present disclosure, in some embodiments, relates to a memory device. The memory device includes a dielectric protection layer having sidewalls defining an opening over a conductive interconnect within an inter-level dielectric (ILD) layer. A bottom electrode structure extends from within the opening to directly over the dielectric protection layer. A variable resistance layer is over the bottom electrode structure and a top electrode is over the variable resistance layer. A top electrode via is disposed on the top electrode and directly over the dielectric protection layer.

公开(公告)号：US20230170909A1

公开(公告)日：2023-06-01

申请号：US17916812

申请日：2021-04-07

申请人： Technion Research & Development Foundation Limited

发明人： Shahar KVATINSKY ,  Barak HOFFER

IPC分类号： H03K19/1776 ,  H03K19/21

CPC分类号： H03K19/1776 ,  H03K19/21 ,  H10N70/026

摘要： A method of using memristor aided logic (MAGIC), comprises connecting together two input and one output memristor between a bit line and a word line, each memristor having a high resistance state and a low resistance state, setting the output memristor to the low resistance state as an initiation state and then applying logic inputs to the input memristors. The output then depends on whether the logic inputs have set the output memristor to the high resistance state.

公开(公告)号：US20240298555A1

公开(公告)日：2024-09-05

申请号：US18177397

申请日：2023-03-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Siang Ruan ,  Chia-Wen Zhong ,  Tzu-Yu Lin ,  Yao-Wen Chang ,  Ching Ju Yang ,  Chin I Wang

IPC分类号： H10N70/00 ,  H10N70/20

CPC分类号： H10N70/8416 ,  H10N70/023 ,  H10N70/026 ,  H10N70/063 ,  H10N70/245 ,  H10N70/883 ,  H01J37/32091 ,  H01J2237/3321

摘要： A semiconductor device that includes a semiconductor substrate, a bottom electrode over the semiconductor substrate, a switching layer over the bottom electrode, a metal ion source layer over the switching layer, and a top electrode over the metal ion source layer. The switching layer includes a compound having aluminum, oxygen, and nitrogen.

公开(公告)号：US20240237566A1

公开(公告)日：2024-07-11

申请号：US18443283

申请日：2024-02-15

申请人： IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)

发明人： Jea Gun PARK ,  Dae Seong WOO ,  Soo Min JIN ,  Sang Hong PARK ,  Sung Mok JUNG

IPC分类号： H10N70/00 ,  G06N3/063 ,  H10B63/00 ,  H10N70/20

CPC分类号： H10N70/8845 ,  G06N3/063 ,  H10B63/80 ,  H10N70/026 ,  H10N70/24 ,  H10N70/841

摘要： Disclosed is an artificial synapse device including an amorphous carbon oxide-based resistance change memory device and a method of fabricating the same, and more particularly to a technology for providing an artificial synapse device capable of implementing the characteristics of biological synapses responsible for memory and information transfer in the human brain using a resistance change memory device. More particularly, the artificial synapse device according to an embodiment of the provided includes a first electrode; a second electrode disposed to face the first electrode; and a switching layer formed of an amorphous carbon oxide deposited by injecting oxygen when sputtering carbon into a target between the first electrode and the second electrode, wherein the artificial synapse device has synaptic characteristics wherein a value of an output current changes gradually when a same voltage of either set voltage or reset voltage is repeatedly applied to the first electrode.

公开(公告)号：US20240188457A1

公开(公告)日：2024-06-06

申请号：US18527152

申请日：2023-12-01

申请人： IMEC VZW ,  Katholieke Universiteit Leuven

发明人： Sergiu CLIMA ,  Taras RAVSHER ,  Geoffrey POURTOIS

IPC分类号： H10N70/00 ,  H10B63/00 ,  H10N70/20

CPC分类号： H10N70/8828 ,  H10B63/24 ,  H10N70/023 ,  H10N70/026 ,  H10N70/20

摘要： In one aspect, a device includes a threshold switch formed of a mixture. The mixture includes at least 0.90 parts by mole of a composition of three or four chemical elements of: from 0.20 to 0.70 parts by mole of Si, from 0.05 to 0.60 parts by mole of Te, and from 0.05 to 0.60 parts by mole of S, P, or a mixture of S and P. The mixture also includes at most 0.10 parts by mole of optional other chemical elements different from Si, Te, S, and P. The parts by mole of the mixture add up to 1.00.