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公开(公告)号：US11139790B2
公开(公告)日：2021-10-05
申请号：US16749628
申请日：2020-01-22
Applicant: Industrial Technology Research Institute
Inventor： Jie Zhang , Tai-Hsing Lee
Abstract: A distributed amplifier with low supply voltage and low power consumption is provided. The distributed amplifier includes an input terminal inputting an input signal; an output terminal outputting an output signal; an amplifier unit; a gate line circuit connected to the input terminal, a first load circuit and the amplifier unit; a second load circuit; a drain line circuit connected to the second load circuit, the amplifier unit and the output terminal; and a bias voltage circuit connected between the drain line circuit and the output terminal, wherein the bias voltage circuit includes a voltage source; an inductor connected to the voltage source and a terminal of the drain line circuit; and a capacitor multiplier connected to the inductor, the drain line circuit and the output terminal.
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公开(公告)号：US12231086B2
公开(公告)日：2025-02-18
申请号：US18097933
申请日：2023-01-17
Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Inventor： Jie Zhang , Sih-Han Li
IPC: H03D7/14
Abstract: A switching circuit includes a transmission gate, two base control sub-circuits each including a first transistor and a second transistor, a third transistor, and a fourth transistor. The transmission gate includes two I/O terminals, two gate control terminals, and two base control terminals, and is configured to conduct or not conduct the two I/O terminals according to the voltage of the two gate control terminals. The two base voltage control sub-circuits, the third transistor and the fourth transistor forms a double balance circuit structure and is electrically connected to the transmission gate. The double balance circuit changes the voltage of the base control terminals according to the voltage of the I/O terminals of the transmission gate.
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公开(公告)号：US12163989B2
公开(公告)日：2024-12-10
申请号：US17559371
申请日：2021-12-22
Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Inventor： Sih-Han Li , Jie Zhang , Peng-I Mei
Abstract: A high-frequency component test device including a test key and a test module is provided. The test key includes a front-level key and a back-level key which are arranged symmetrically and have the same electrical length and characteristic impedance. The test module is used to measure an S parameter of the front-level key and the back-level key connected directly and an S parameter of a structure where a device under test (DUT) is added between the front-level key and the back-level key. The test module performs S parameter calculation in the frequency domain and converts the S parameter into an ABCD parameter matrix, and then obtains an ABCD parameter of a de-embedded DUT using a matrix root-opening operation and an inverse matrix operation.
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公开(公告)号：US12154905B2
公开(公告)日：2024-11-26
申请号：US17372132
申请日：2021-07-09
Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Inventor： Jie Zhang , Tai-Hsing Lee , Sih-Han Li
IPC: H01L27/118 , H01L25/065 , H03K17/60 , H03K17/687 , H01L23/00
Abstract: An arrayed switch circuit includes a substrate, signal conductive pads and signal expansion pins. The signal conductive pads are disposed on the substrate at intervals, and the signal conductive pads are arranged to form a signal conductive pad array. Each of the signal conductive pads has a row position and a column position in the signal conductive pad array. A row signal switch is provided between any two adjacent signal conductive pads corresponding to the same row position, and a column signal switch is provided between any two adjacent signal conductive pads corresponding to the same column position. The signal expansion pins are connected to the signal conductive pads located on at least one side of the signal conductive pad array through signal expansion switches respectively.
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