INTERCONNECT CLIP FOR VERTICALLY STACKED DIE ARRANGEMENT

    公开(公告)号:US20250096082A1

    公开(公告)日:2025-03-20

    申请号:US18369443

    申请日:2023-09-18

    Abstract: An electrical interconnect clip includes a die interface portion that is adapted for mating in between two vertically stacked semiconductor dies, and a carrier connection portion that is configured to electrically connect the two vertically stacked semiconductor dies with a carrier, wherein the die interface portion comprises a lower mating surface, an upper mating surface opposite from the lower mating surface, and a solder retention feature formed by one or more grooves in the upper mating surface that are spaced apart from the outer edge sides of the electrical interconnect clip and surround a die attach area of the upper mating surface.

Patent Agency Ranking