公开(公告)号：US10075141B1

公开(公告)日：2018-09-11

申请号：US15453525

申请日：2017-03-08

Applicant: INPHI CORPORATION

Inventor： Rajasekhar Nagulapalli ,  Simon L Forey ,  Parmanand Mishra

IPC: H03G3/30 ,  H03F3/193 ,  H03F3/45 ,  H04L25/03

CPC classification number: H03G3/3042 ,  H03F1/086 ,  H03F3/193 ,  H03F3/45179 ,  H03F3/45197 ,  H03F3/45659 ,  H03F2203/45151 ,  H03F2203/45156 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45458 ,  H03F2203/45488 ,  H03G5/28 ,  H04L25/03012 ,  H04L25/03878 ,  H04L2025/03445 ,  H04L2025/03535

Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the presentation provide a CTLE module that includes a two compensation sections. A high-frequency zero RC section is in the source of the differential pair and close to the bias current source. A low-frequency zero section is coupled to an output terminal and configured outside the input signal path. A DC gain tuning section is coupled to the low-frequency zero section. There are other embodiments as well.