Abstract:
Disclosed herein are related to a system and a method of amplifying an input voltage based on cascaded charge pump boosting. In one aspect, first electrical charges are stored at a first capacitor according to the input voltage to obtain a second voltage. In one aspect, the second voltage is amplified according to the first electrical charges stored by the first capacitor to obtain a third voltage. In one aspect, second electrical charges are stored at the second capacitor according to the third voltage. In one aspect, the third voltage is amplified according to the second electrical charges stored by the second capacitor to obtain a fourth voltage.
Abstract:
A power amplifier includes a two-dimensional matrix of N×M active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately N×M the output power of each of the active cells.
Abstract:
A current measurement circuit converts a current signal IIN into a voltage signal VOUT. The current signal IIN is transmitted via a signal line. A shield line is arranged in the vicinity of at least a part of the signal line. A non-inverting amplifier includes an operational amplifier, and the current signal IIN is input to its non-inverting input terminal. The output signal of the non-inverting amplifier is input to its inverting input terminal as a feedback signal. An inverting amplifier amplifies the output signal of the non-inverting amplifier with inversion so as to generate a voltage signal VOUT. An impedance circuit includes a feedback resistor RF between the output terminal of the inverting amplifier and the non-inverting input terminal of the operational amplifier. A guard amplifier receives the electric potential at the inverting input terminal of the operational amplifier, and applies the electric potential to the shield line.
Abstract:
An amplifier operates to provide a high output impedance at an output through a push stage having a first transistor of a first transistor type and a pull stage having a second transistor of a second transistor type that is different from the first transistor type. The first transistor and the second transistor are coupled in a common-gate configuration. The first transistor and the second transistor are shorted together via a capacitor coupled to an input and share a common current path as a push-pull current-reusing common-gate low noise amplifier with a broadband input matching.
Abstract:
An amplifier operates to provide a high output impedance at an output through a push stage having a first transistor of a first transistor type and a pull stage having a second transistor of a second transistor type that is different from the first transistor type. The first transistor and the second transistor are coupled in a common-gate configuration. The first transistor and the second transistor are shorted together via a capacitor coupled to an input and share a common current path as a push-pull current-reusing common-gate low noise amplifier with a broadband input matching.
Abstract:
Disclosed herein are novel charge mode readout circuits and associated methods of signal processing. The devices and methods of the invention allow for the improved processing of stored signals by a charge mode readout amplifier, wherein the readout level may be shifted to a desired range and wherein a fully differential output swing may be imparted. The invention advantageously employs a single pair of capacitors to serve the dual roles of modulating amplifier gain and level shifting the output.
Abstract:
A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
Abstract:
A current sense circuit having a single opamp DC offset auto-zero capability that allows for continuous current sensing operation while at the same time providing for DC offset sensing and compensation. The single opamp design can operate in a first phase to sense and store a DC offset, while providing an output to drive an output stage of the current sense circuit. The single opamp design can operate in a second phase, using the sensed DC offset to generate an accurate output that can drive the output stage and which can be used in the first phase.
Abstract:
An apparatus includes an operational amplifier and a plurality of capacitors coupled to an input terminal of the operational amplifier and configured to be selectively coupled to receive one of an input voltage signal and an output voltage signal of the operational amplifier.
Abstract:
An amplifier circuit is disclosed that allows for practical integrated circuit implementation of a dc-blocked, low-noise differential amplifier capable of amplifying ultra low-frequency signals and amplitudes ranging upwards of a few microvolts. DC-blocking capacitors having a capacitance value close to that of the effective input capacitance of the low-noise amplifier's inputs can be used by incorporating a positive feedback mechanism that tracks any variations in the amplifier gain or integrated circuit's technology process and lowers or cancels the input parasitic capacitances. Advantageously, the parasitic capacitance of transistors, typically field effect transistors, located on an integrated circuit chip are used in the feedback mechanism. This reduces the capacitive voltage division loss of the signal at the input of the amplifier while still allowing for the use of very small values of dc-blocking capacitance. No other active elements other than the amplifier itself are required to attain a low area, integrated circuit implementation of a dc-blocked, yet ultra low-frequency high pass filtered, low-noise amplifier.