公开(公告)号：US10228938B2

公开(公告)日：2019-03-12

申请号：US15396345

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Karthik Raman ,  Ariel Slonim ,  Ady Tal

IPC: G06F9/30 ,  G06F11/30

Abstract: An apparatus and method are described for floating point operation (FLOP) accounting. For example, one embodiment of a processor comprises: an instruction fetch unit to fetch instructions from system memory, the instructions including at least one masked vector floating point instruction to perform operations on a plurality of floating point data elements; a mask register to store a mask value associated with the masked vector floating point instruction; a decoder to decode the masked vector floating point instruction; and floating point operations (FLOP) accounting circuitry to read the mask register to determine a number of floating point operations to be performed during execution of the masked vector floating point instruction.

公开(公告)号：US09766968B2

公开(公告)日：2017-09-19

申请号：US14668862

申请日：2015-03-25

Applicant: Intel Corporation

Inventor： Tomer Stark ,  Ady Tal ,  Ron Gabor ,  Joseph Nuzman

IPC: G06F11/07 ,  G06F11/10

CPC classification number: G06F11/079 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0772 ,  G06F11/10 ,  G06F11/1064

Abstract: Memory corruption detection technologies are described. A processor can include a memory to store data from an application, wherein the memory comprises a memory corruption detection (MCD) table. The processor can also include processor core coupled to the memory. The processor core can receive, from an application, a memory access request to access data of one or more contiguous memory blocks in a memory object of the memory. The processor core can also retrieve data stored in the one or more contiguous memory blocks based on the location indicated by the pointer. The processor core can also retrieve, from the MCD table, allocation information associated with the one or more contiguous memory blocks. The processor core can also send, to the application, a fault message when a fault event associated with the retrieved data occurs based on the allocation information.

公开(公告)号：US20160371139A1

公开(公告)日：2016-12-22

申请号：US14745172

申请日：2015-06-19

Applicant: Intel Corporation

Inventor： Tomer Stark ,  Ron Gabor ,  Ady Tal ,  Joseph Nuzman

IPC: G06F11/07 ,  G06F11/16

CPC classification number: G06F12/1425 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0766 ,  G06F11/0772 ,  G06F11/0787 ,  G06F11/1666 ,  G06F12/0238 ,  G06F2201/80 ,  G06F2212/1032

Abstract: Memory corruption detection technologies are described. A processing system can include a processor core including a register to store an address of a memory corruption detection (MCD) table. The processor core can receive, from an application, a memory store request to store data in a first portion of a contiguous memory block of the memory object of a memory. The memory store request comprises a first pointer indicating a first location of the first portion in the memory block to store the data. The processor core can retrieve, from the MCD table, a write protection indicator that indicates a first protection mode of the first portion. The processor core can send, to the application, a fault message when a fault event associated with the first portion occurs based on the first protection mode of the first portion.

Abstract translation: 描述了内存损坏检测技术。 处理系统可以包括处理器核心，其包括用于存储存储器破坏检测（MCD）表的地址的寄存器。 处理器核心可以从应用程序接收存储器存储请求，以将数据存储在存储器的存储器对象的连续存储器块的第一部分中。 存储器存储请求包括指示存储器块中的第一部分的第一位置以存储数据的第一指针。 处理器核心可以从MCD表中检索指示第一部分的第一保护模式的写保护指示符。 当基于第一部分的第一保护模式发生与第一部分相关联的故障事件时，处理器核心可以向应用发送故障消息。

公开(公告)号：US10976961B2

公开(公告)日：2021-04-13

申请号：US16228374

申请日：2018-12-20

Applicant: Intel Corporation

Inventor： Ron Gabor ,  Tomer Stark ,  Joseph Nuzman ,  Ady Tal

IPC: G06F9/34 ,  G06F3/06 ,  G06F11/07 ,  G06F9/38

Abstract: Techniques and mechanisms for circuitry of a processor to automatically provide, and perform an operation based on, metadata indicating an uninitialized memory block. In an embodiment, processor circuitry detects a software instruction which specifies a first operation to be performed based on some data at a memory block. Metadata corresponding to said data comprises an identifier of whether the data is based on an uninitialized memory condition. Processing of the instruction, includes the processor circuitry automatically performing a second operation based on the identifier. The second operation is performed independent of any instruction of the application which specifies the second operation. In another embodiment, execution of the instruction (if any) is conditional upon an evaluation which is based on the state identifier, or the second operation is automatically performed based on an execution of the first instruction.

公开(公告)号：US10095573B2

公开(公告)日：2018-10-09

申请号：US15708079

申请日：2017-09-18

Applicant: Intel Corporation

Inventor： Tomer Stark ,  Ady Tal ,  Ron Gabor ,  Joseph Nuzman

IPC: G06F11/07 ,  G06F11/10

Abstract: Memory corruption detection technologies are described. A processor can include a memory to store a memory corruption detection (MCD) table. A processor core of the processor can receive, from an application, an allocation request for an allocation of a memory object within a contiguous memory block in the memory. The processor core can allocate the contiguous memory block in view of a size of the memory object requested and write MCD meta-data into the MCD table, including a MCD identifier (ID) associated with the contiguous memory block and a MCD border value indicating a size of a memory region of the contiguous memory block.

公开(公告)号：US10073727B2

公开(公告)日：2018-09-11

申请号：US14635896

申请日：2015-03-02

Applicant: Intel Corporation

Inventor： Tomer Stark ,  Ady Tal ,  Ron Gabor

IPC: G06F11/10 ,  G06F11/07

CPC classification number: G06F11/079 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0772 ,  G06F11/10 ,  G06F11/1064

Abstract: Memory corruption detection technologies are described. A method can include receiving, from the application, an allocation request for an allocation of one or more contiguous memory blocks of the memory for a memory object. The method can further include allocating, by a processor, the one or more contiguous memory blocks for the memory object in view of a size of the memory object requested. The method can further include writing, into a MCD table, a first memory corruption detection (MCD) unique identifier associated with the one or more contiguous memory blocks. The method can further include creating a pointer with a memory address of the memory object and a second MCD unique identifier associated with the memory object. The method can further include sending, to the application, the pointer.

公开(公告)号：US10585741B2

公开(公告)日：2020-03-10

申请号：US16123933

申请日：2018-09-06

Applicant: Intel Corporation

Inventor： Tomer Stark ,  Ady Tal ,  Ron Gabor

IPC: G06F11/10 ,  G06F11/07

Abstract: Memory corruption detection technologies are described. A processor core of a processor can receive a first pointer produced by a first memory access instruction of an application being executed by the processor. The first pointer includes a first memory address of a first memory object and a third metadata value and the memory address identifies a memory block in the first set of one or more contiguous memory blocks. The processor core compares the third metadata value to the first metadata value and communicates a memory corruption detection message to the application when the third metadata value does not match the first metadata value. The processor core provides the first memory object to the application when the third metadata value matches the first metadata value.

公开(公告)号：US09052947B2

公开(公告)日：2015-06-09

申请号：US14028018

申请日：2013-09-16

Applicant: Intel Corporation

Inventor： Ali-Reza Adl-Tabatabai ,  Moshe Bach ,  Sion Berkowits ,  James Henry Cownie ,  Yang Ni ,  Jeffrey V. Olivier ,  Bratin Saha ,  Ady Tal ,  Adam Welc

IPC: G06F9/46 ,  G06F17/30 ,  G06F9/52

CPC classification number: G06F9/467 ,  G06F9/528 ,  G06F17/30351 ,  G06F17/30353 ,  G06F17/30356 ,  G06F17/30359

Abstract: A method and apparatus for unified concurrency control in a Software Transactional Memory (STM) is herein described. A transaction record associated with a memory address referenced by a transactional memory access operation includes optimistic and pessimistic concurrency control fields. Access barriers and other transactional operations/functions are utilized to maintain both fields of the transaction record, appropriately. Consequently, concurrent execution of optimistic and pessimistic transactions is enabled.

Abstract translation: 这里描述了用于软件事务存储器（STM）中的统一并发控制的方法和装置。 与由事务性存储器访问操作引用的存储器地址相关联的事务记录包括乐观和悲观的并发控制字段。 利用访问障碍和其他交易操作/功能来适当地维护交易记录的两个领域。 因此，同时执行乐观和悲观的交易得以实现。

公开(公告)号：US09934164B2

公开(公告)日：2018-04-03

申请号：US15460977

申请日：2017-03-16

Applicant: INTEL CORPORATION

Inventor： Tomer Stark ,  Ron Gabor ,  Ady Tal ,  Joseph Nuzman

IPC: G06F11/00 ,  G06F12/14 ,  G06F12/02 ,  G06F11/07

CPC classification number: G06F12/1425 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0766 ,  G06F11/0772 ,  G06F11/0787 ,  G06F11/1666 ,  G06F12/0238 ,  G06F2201/80 ,  G06F2212/1032

Abstract: Memory corruption detection technologies are described. A system on a chip (SoC) may include a memory device and a memory controller. The memory device may store data from an application, wherein the memory device comprises a memory corruption detection (MCD) table. The memory controller may be coupled to the memory device. The memory controller may allocate a contiguous memory block in the memory and write a MCD word into the MCD table. The MCD word may include a write protection indicator that indicates a protection mode of a first portion of the contiguous memory block.

公开(公告)号：US20160283300A1

公开(公告)日：2016-09-29

申请号：US14668862

申请日：2015-03-25

Applicant: Intel Corporation

Inventor： Tomer Stark ,  Ady Tal ,  Ron Gabor ,  Joseph Nuzman

IPC: G06F11/07

CPC classification number: G06F11/079 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0772 ,  G06F11/10 ,  G06F11/1064

Abstract: Memory corruption detection technologies are described. A processor can include a memory to store data from an application, wherein the memory comprises a memory corruption detection (MCD) table. The processor can also include processor core coupled to the memory. The processor core can receive, from an application, a memory access request to access data of one or more contiguous memory blocks in a memory object of the memory. The processor core can also retrieve data stored in the one or more contiguous memory blocks based on the location indicated by the pointer. The processor core can also retrieve, from the MCD table, allocation information associated with the one or more contiguous memory blocks. The processor core can also send, to the application, a fault message when a fault event associated with the retrieved data occurs based on the allocation information.

Abstract translation: 描述了内存损坏检测技术。 处理器可以包括用于存储来自应用程序的数据的存储器，其中所述存储器包括存储器损坏检测（MCD）表。 处理器还可以包括耦合到存储器的处理器核心。 处理器核心可以从应用程序接收存储器访问请求以访问存储器的存储器对象中的一个或多个连续存储器块的数据。 处理器核还可以基于指示器指示的位置来检索存储在一个或多个连续存储器块中的数据。 处理器核心还可以从MCD表中检索与一个或多个连续存储器块相关联的分配信息。 当与检索到的数据相关联的故障事件基于分配信息发生时，处理器核心还可以向应用发送故障消息。