公开(公告)号：US10241556B2

公开(公告)日：2019-03-26

申请号：US15025575

申请日：2013-11-27

Applicant: Intel Corporation

Inventor： Vinu K. Elias ,  Sundar Ramani ,  Arvind S. Tomar ,  Jianjun Liu

IPC: G06F1/32 ,  G06F1/3212 ,  H03K19/0185 ,  G06F1/3234 ,  G11C7/10

Abstract: In an embodiment, an apparatus includes an input/output (I/O) buffer to couple a logic unit to another device coupled via a pad, and a logic coupled to the I/O buffer to detect a value on the pad and to control the I/O buffer to provide the value to the pad, responsive to entry into an architectural state. Other embodiments are described and claimed.

公开(公告)号：US10884476B2

公开(公告)日：2021-01-05

申请号：US16290310

申请日：2019-03-01

Applicant: Intel Corporation

Inventor： Vinu K. Elias ,  Sundar Ramani ,  Arvind S. Tomar ,  Jianjun Liu

IPC: G06F1/32 ,  G06F1/3212 ,  H03K19/0185 ,  G06F1/3234 ,  G11C7/10

Abstract: In an embodiment, an apparatus includes an input/output (I/O) buffer to couple a logic unit to another device coupled via a pad, and a logic coupled to the I/O buffer to detect a value on the pad and to control the I/O buffer to provide the value to the pad, responsive to entry into an architectural state. Other embodiments are described and claimed.

公开(公告)号：US20190043446A1

公开(公告)日：2019-02-07

申请号：US15944592

申请日：2018-04-03

Applicant: Intel Corporation

Inventor： Nobuyuki Suzuki ,  Zhiming Zhuang ,  Arvind S. Tomar ,  Nausheen Ansari

IPC: G09G5/12 ,  G06F3/14 ,  G06F3/044 ,  G06F3/041 ,  G09G5/18

Abstract: Embodiments include apparatuses, methods, and systems including a selector. A selection signal may be provided to the selector to select a first synchronization signal as a control signal when the first synchronization signal is available, otherwise a second first synchronization signal as the control signal. The first or the second synchronization signal may synchronize a first or second display content received by a first or second display device with a first or a second display refresh rate, respectively. The control signal may be provided to a controller to control the second display content received by the second display device. Other embodiments may also be described and claimed.

公开(公告)号：US10762875B2

公开(公告)日：2020-09-01

申请号：US15944592

申请日：2018-04-03

Applicant: Intel Corporation

Inventor： Nobuyuki Suzuki ,  Zhiming Zhuang ,  Arvind S. Tomar ,  Nausheen Ansari

IPC: G06F3/038 ,  G09G5/00 ,  G09G5/12 ,  G06F3/14 ,  G09G5/18 ,  G06F3/044 ,  G06F3/041

Abstract: Embodiments include apparatuses, methods, and systems including a selector. A selection signal may be provided to the selector to select a first synchronization signal as a control signal when the first synchronization signal is available, otherwise a second first synchronization signal as the control signal. The first or the second synchronization signal may synchronize a first or second display content received by a first or second display device with a first or a second display refresh rate, respectively. The control signal may be provided to a controller to control the second display content received by the second display device. Other embodiments may also be described and claimed.

公开(公告)号：US12249297B2

公开(公告)日：2025-03-11

申请号：US17359218

申请日：2021-06-25

Applicant: INTEL CORPORATION

Inventor： Soorya Ramesh ,  Priyanka Karwa ,  Susanta Bhattacharjee ,  Geethacharan Rajagopalan ,  Arvind S. Tomar

IPC: G09G5/10 ,  G09G3/20

Abstract: Methods and systems for dynamically adjusting the power consumption of an organic light-emitting diode (OLED) panel are disclosed. In embodiments, a histogram of a frame to be displayed is generated, and a weighted dimming curve is generated, with heavier weighting given to mid-tone intensity pixels. High and low intensity pixels are left only minimally adjusted. The curve is then capped and smoothed to prevent artifacts and to preserve image contrast. Each pixel in the frame is then dimmed according to the curve, and the resultant transformed frame is displayed on the OLED panel.

公开(公告)号：US20190196568A1

公开(公告)日：2019-06-27

申请号：US16290310

申请日：2019-03-01

Applicant: Intel Corporation

Inventor： Vinu K. Elias ,  Sundar Ramani ,  Arvind S. Tomar ,  Jianjun Liu

IPC: G06F1/3212 ,  H03K19/0185 ,  G06F1/3234

CPC classification number: G06F1/3212 ,  G06F1/3234 ,  G11C7/1057 ,  G11C7/1084 ,  G11C2207/105 ,  H03K19/018585 ,  H03K19/018592

Abstract: In an embodiment, an apparatus includes an input/output (I/O) buffer to couple a logic unit to another device coupled via a pad, and a logic coupled to the I/O buffer to detect a value on the pad and to control the I/O buffer to provide the value to the pad, responsive to entry into an architectural state. Other embodiments are described and claimed.