公开(公告)号：US10924753B2

公开(公告)日：2021-02-16

申请号：US14139716

申请日：2013-12-23

Applicant: INTEL CORPORATION

Inventor： James M. Holland ,  Atthar H. Mohammed ,  Srinivasan Embar Raghukrishnan

IPC: H04N19/436 ,  H04N19/577 ,  H04N19/573 ,  H04N19/53 ,  H04N19/58

Abstract: An apparatus may include a memory to receive an image frame to encode; and a modular motion estimation engine to process the image frame. The modular motion estimation engine includes modular motion estimation circuitry comprising a multiplicity of motion estimation circuits, and a motion estimation kernel for execution on the modular motion estimation circuitry to send the image frame through one or more configurable execution pipelines that each execute motion estimation over one or more of the motion estimation circuits.

公开(公告)号：US20200334880A1

公开(公告)日：2020-10-22

申请号：US16839583

申请日：2020-04-03

Applicant: Intel Corporation

Inventor： Stanley J. Baran ,  Abhishek R. Appu ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Joydeep Ray ,  Kunjal Parikh ,  Changliang Wang ,  Srikanth Kambhatla ,  Gary Smith ,  Satyanarayana Avadhanam ,  Richmond Hicks ,  Robert J. Johnston ,  Narayan Biswal ,  Susanta Bhattacharjee

IPC: G06T11/60 ,  H04N9/77 ,  G06T5/00

Abstract: Systems, apparatuses and methods may a performance-enhanced computing system comprising a sensor for measuring luminance values corresponding to light focused onto the sensor at a plurality of pixel locations, a memory including a set of instructions, and a processor. The processor executes a set of instructions causing the system to generate a multi-segment tone mapping curve, generate a set of tone mapping values corresponding to the multi-segment tone mapping curve for equally spaced input values between zero and one for storage into a look up table, and process the luminance values using the look up table to apply the tone mapping curve to the luminance values of the pixels.

公开(公告)号：US20200236363A1

公开(公告)日：2020-07-23

申请号：US16747117

申请日：2020-01-20

Applicant: Intel Corporation

Inventor： Robert J. Johnston ,  Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Joydeep Ray

IPC: H04N19/137 ,  H04N19/17 ,  H04N19/182 ,  H04N19/167 ,  H04N19/107 ,  H04N19/124 ,  G11B27/00

Abstract: Image information is often transmitted from one electronic device to another. Such information is typically encoded and/or compressed to reduce the bandwidth required for transmission and/or to decrease the time necessary for transmission. Embodiments are directed to tagging objects or primitives with attribute tags to facilitate the encoding process. Other embodiments are directed to codecs running on hardware and/or software.

公开(公告)号：US10587800B2

公开(公告)日：2020-03-10

申请号：US15483787

申请日：2017-04-10

Applicant: Intel Corporation

Inventor： Jill M. Boyce ,  Stanley J. Baran ,  Sumit Mohan ,  Yi-Jen Chiu ,  Jason Tanner ,  Atthar H. Mohammed ,  Richmond Hicks ,  Barnan Das

IPC: H04N5/232 ,  H04N19/103 ,  H04N5/247 ,  H04N7/01 ,  H04N19/167 ,  H04N19/119 ,  H04N19/56 ,  H04N19/124 ,  H04N19/31 ,  H04N5/917

Abstract: Systems, apparatuses and methods may determine, on a per camera basis, an interest level with respect to panoramic video content, identify a subset of cameras in a plurality of cameras for which the interest level is below a threshold, and reduce power consumption in the subset of cameras. Additionally, technology may determine a projection format associated with panoramic video content, identify one or more discontinuous boundaries in the projection format, and modify an encoding scheme associated with the panoramic video content based on the discontinuous boundaries. Moreover, an encoded frame may be assigned to a temporal scalability layer that has a higher priority than a layer to which an asynchronous space warp frame is assigned. Additionally, technology may reduce the encoding complexity of a boundary between an active region and an inactive region in fisheye content.

公开(公告)号：US20190020872A1

公开(公告)日：2019-01-17

申请号：US15651620

申请日：2017-07-17

Applicant: Intel Corporation

Inventor： Fangwen Fu ,  Srinivasan Embar Raghukrishnan ,  Atthar H. Mohammed

IPC: H04N19/124 ,  H04N19/52 ,  H04N19/176

CPC classification number: H04N19/124 ,  G06F17/11 ,  H04N19/103 ,  H04N19/147 ,  H04N19/159 ,  H04N19/176 ,  H04N19/52

Abstract: Systems, apparatus and methods are described including operations for video coding rate control including Rate Distortion Optimized Quantization on a block-by-block basis.

公开(公告)号：US20180300905A1

公开(公告)日：2018-10-18

申请号：US15488801

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Robert J. Johnston ,  Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Joydeep Ray

IPC: G06T9/00 ,  H04N19/136 ,  G06T15/00

Abstract: Image information is often transmitted from one electronic device to another. Such information is typically encoded and/or compressed to reduce the bandwidth required for transmission and/or to decrease the time necessary for transmission. Embodiments are directed to tagging objects or primitives with attribute tags to facilitate the encoding process. Other embodiments are directed to codecs running on hardware and/or software.

公开(公告)号：US11423507B2

公开(公告)日：2022-08-23

申请号：US17159708

申请日：2021-01-27

Applicant: Intel Corporation

Inventor： Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Jill M. Boyce ,  Fangwen Fu ,  Satya N. Yedidi ,  Sumit Mohan ,  James M. Holland ,  Keith W. Rowe ,  Altug Koker

IPC: G06T1/20 ,  G06T1/60 ,  G09G5/00 ,  H04N19/156 ,  G06F1/3206 ,  G06F1/3234 ,  G06F1/3212

Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.

公开(公告)号：US11412230B2

公开(公告)日：2022-08-09

申请号：US17153965

申请日：2021-01-21

Applicant: Intel Corporation

Inventor： Jong Dae Oh ,  Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Hiu-Fai R. Chan ,  Joydeep Ray

IPC: H04N7/12 ,  H04N19/156 ,  H04N7/01 ,  H04N19/132 ,  H04N19/172 ,  G06T1/20

Abstract: Systems and methods may provide for occlusion detection in frame rate conversion. Detecting the occlusion allows frame rate conversion to be more accurately performed. In some embodiments, one or more stereoscopic depth cameras may be used to determine the depth of a moving object to more accurately determine the occlusion. In some embodiments, the compression ratio may be adjusted to balance the frame rate and power to help ensure compliance with a power budget. In at least some embodiments, the motion of a camera may be passed from a 3D render pipe to an encoder to avoid motion calculation and thereby saving power.

公开(公告)号：US20210281851A1

公开(公告)日：2021-09-09

申请号：US17153965

申请日：2021-01-21

Applicant: Intel Corporation

Inventor： Jong Dae Oh ,  Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Hiu-Fai R. Chan ,  Joydeep Ray

IPC: H04N19/156 ,  H04N7/01 ,  H04N19/132 ,  H04N19/172 ,  G06T1/20

Abstract: Systems and methods may provide for occlusion detection in frame rate conversion. Detecting the occlusion allows frame rate conversion to be more accurately performed. In some embodiments, one or more stereoscopic depth cameras may be used to determine the depth of a moving object to more accurately determine the occlusion. In some embodiments, the compression ratio may be adjusted to balance the frame rate and power to help ensure compliance with a power budget. In at least some embodiments, the motion of a camera may be passed from a 3D render pipe to an encoder to avoid motion calculation and thereby saving power.

公开(公告)号：US10909653B2

公开(公告)日：2021-02-02

申请号：US16515794

申请日：2019-07-18

Applicant: Intel Corporation

Inventor： Abhishek R. Appu ,  Stanley J. Baran ,  Sang-Hee Lee ,  Atthar H. Mohammed ,  Jong Dae Oh ,  Hiu-Fai R. Chan ,  Jill M. Boyce ,  Fangwen Fu ,  Satya N. Yedidi ,  Sumit Mohan ,  James M. Holland ,  Keith W. Rowe ,  Altug Koker

IPC: G06T1/20 ,  H04N19/156 ,  G06T1/60 ,  G09G5/00 ,  G06F1/3206 ,  G06F1/3234 ,  G06F1/3212

Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.