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    Method and apparatus for extracting and using path shading coherence in a ray tracing architecture
    2.
    发明授权
    Method and apparatus for extracting and using path shading coherence in a ray tracing architecture 有权

    公开(公告)号：US10262456B2

    公开(公告)日：2019-04-16

    申请号：US14975754

    申请日：2015-12-19

    Applicant: INTEL CORPORATION

    Inventor： Attila T. Afra ,  Carl J. Munkberg

    IPC: G06T15/06 ,  G06T15/80

    Abstract: An apparatus and method for extracting and using path shading coherence in a ray tracing architecture. For example, one embodiment of a graphics processing apparatus comprises: ray generation logic to generate a ray stream from one or more image tiles; ray sorting logic to sort the rays within the ray stream based on a material identifier (ID) associated with each of the rays to generate a sorted ray stream; and one or more shaders to perform shading operations on rays within the sorted ray stream in an order in which the rays are sorted within the sorted ray stream.

    Selective rasterization
    3.
    发明授权
    Selective rasterization 有权

    公开(公告)号：US10164459B2

    公开(公告)日：2018-12-25

    申请号：US15605016

    申请日：2017-05-25

    Applicant: Intel Corporation

    Inventor： Tomas G. Akenine-Moller ,  Carl J. Munkberg ,  Franz P. Clarberg

    IPC: H02J7/00 ,  G01R19/00 ,  H02J7/02 ,  H02J7/04 ,  G06T11/40

    Abstract: According to one embodiment, a given tile, made up of pixels or samples, may be of any shape, including a square shape. These pixels may contain colors, depths, stencil values, and other values. Each tile may be further augmented with a single bit, referred to herein as a render bit. In one embodiment, if the render bit is one, then everything is rendered as usual within the tile. However, if the render bit is zero, then nothing is rasterized to this tile and, correspondingly, depth tests, pixel shading, frame buffer accesses, and multi-sampled anti-aliasing (MSAA) resolves are not done for this tile. In other embodiments, some operations may be done nevertheless, but at least one operation is avoided based on the render bit. Of course, the render bits may be switched such that the bit zero indicates that everything should be rendered and the bit one indicates more limited rendering.

    Adaptive multi-frequency shading
    4.
    发明授权
    Adaptive multi-frequency shading 有权

    公开(公告)号：US10074213B2

    公开(公告)日：2018-09-11

    申请号：US14227045

    申请日：2014-03-27

    Applicant: Intel Corporation

    Inventor： Franz P. Clarberg ,  Tomas G. Akenine-Moller ,  Robert M. Toth ,  Carl J. Munkberg

    IPC: G06T15/80 ,  G06T15/00

    CPC classification number: G06T15/80 ,  G06T15/005

    Abstract: An architecture for pixel shading, enables flexible control of shading rates and automatic shading reuse between triangles in tessellated primitives in some embodiments. The cost of pixel shading may then be decoupled from the geometric complexity. Wider use of tessellation and fine geometry may be made more feasible, even at very limited power budgets. Shading may be done over small local grids in parametric patch space, with reusing of shading for nearby samples. The decomposition of shaders into multiple parts is supported, which parts are shaded at different frequencies. Shading rates can be locally and adaptively controlled, in order to direct the computations to visually important areas and to provide performance scaling with a graceful degradation of quality. Another important benefit, in some embodiments, of shading in patch space is that it allows efficient rendering of distribution effects, which further closes the gap between real-time and offline rendering.

    Image processing techniques for tile-based rasterization
    8.
    发明授权
    Image processing techniques for tile-based rasterization 有权
    基于瓦片的光栅化的图像处理技术

    公开(公告)号：US09406100B2

    公开(公告)日：2016-08-02

    申请号：US14931285

    申请日：2015-11-03

    Applicant: Intel Corporation

    Inventor： Tomas G. Akenine-Moller ,  Robert M. Toth ,  Jon N. Hasselgren ,  Carl J. Munkberg ,  Franz P. Clarberg

    IPC: G06T1/20 ,  G06T11/40

    CPC classification number: G06T1/20 ,  G06T11/40 ,  G06T15/005 ,  G06T2210/12

    Abstract: Techniques are described that can delay or even prevent use of memory to store triangles associated with tiles as well as processing resources associated with vertex shading and binning triangles. The techniques can also provide better load balancing among a set of cores, and hence provide better performance. A bounding volume is generated to represent a geometry group. Culling takes place to determine whether a geometry group is to have triangles rendered. Vertex shading and association of triangles with tiles can be performed across multiple cores in parallel. Processing resources are allocated for rasterizing tiles whose triangles have been vertex shaded and binned over tiles whose triangles have yet to be vertex shaded and binned. Rasterization of triangles of different tiles can be performed by multiple cores in parallel.

    Abstract translation: 描述了可以延迟甚至阻止使用存储器来存储与瓦片相关联的三角形以及处理与顶点着色和合并三角形相关联的资源的技术。 这些技术还可以在一组核心之间提供更好的负载平衡，从而提供更好的性能。 生成一个边界体来表示一个几何组。 进行剔除以确定几何组是否具有呈现的三角形。 顶点阴影和三角形与瓦片的关联可以并行执行多个核心。 分配处理资源用于光栅化其三角形已经被顶点着色的图块，并且在三角形尚未被顶点着色和分块的图块上进行分块。 不同瓦片三角形的光栅化可以由多个并行的核心执行。

    Hierarchical motion blur rasterization
    10.
    发明授权
    Hierarchical motion blur rasterization 有权
    分层运动模糊光栅化

    公开(公告)号：US09142008B2

    公开(公告)日：2015-09-22

    申请号：US14482149

    申请日：2014-09-10

    Applicant: Intel Corporation

    Inventor： Franz P. Clarberg ,  Carl J. Munkberg ,  Jon N. Hasselgren ,  Tomas G. Akenine-Moller

    IPC: G06T5/00 ,  G06T13/80 ,  G06T11/40

    CPC classification number: G06T5/002 ,  G06T11/40 ,  G06T13/80 ,  G06T2207/20182

    Abstract: Motion blur rasterization may involve executing a first test for each plane of a tile frustum. The first test is a frustum plane versus moving bounding box overlap test where planes bounding a moving primitive are overlap tested against a screen tile frustum. According to a second test executed after the first test, for primitive edges against tile corners, the second test is a tile corner versus moving edge overlap test. The corners of the screen space tile are tested against a moving triangle edge in two-dimensional homogeneous space.

    Abstract translation: 运动模糊光栅化可能涉及对平截头体的每个平面执行第一次测试。 第一个测试是平截头体平面与移动边界框重叠测试，其中界定移动基元的平面与屏幕平截头体重叠测试。 根据在第一次测试之后执行的第二次测试，对于平铺角落的原始边缘，第二个测试是相对于移动边缘重叠测试的瓦片角。 屏幕空间瓦片的角部针对二维均匀空间中的移动三角形边缘进行测试。

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