公开(公告)号：US20170287808A1

公开(公告)日：2017-10-05

申请号：US15625947

申请日：2017-06-16

Applicant: Intel Corporation

Inventor： Henning BRAUNISCH ,  Feras EID ,  Adel A. ELSHERBINI ,  Johanna M. SWAN ,  Don W. NELSON

IPC: H01L23/498 ,  H01L23/367 ,  H01L21/52 ,  H01L23/473

CPC classification number: H01L23/3675 ,  H01L21/52 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/473 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5389 ,  H01L2924/0002 ,  H05K1/021 ,  H05K1/185 ,  H05K2201/066 ,  H05K2201/10416 ,  H05K2201/10545 ,  H01L2924/00

Abstract: An apparatus including a die, a first side of the die including a first type of system level contact points and a second side including a second type of contact points; and a package substrate coupled to the die and the second side of the die. An apparatus including a die, a first side of the die including a plurality of system level logic contact points and a second side including a second plurality of system level power contact points. A method including coupling one of a first type of system level contact points on a first side of a die and a second type of system level contact points on a second side of the die to a package substrate.

公开(公告)号：US20160211190A1

公开(公告)日：2016-07-21

申请号：US14914998

申请日：2013-09-27

Applicant: INTEL CORPORATION

Inventor： Henning BRAUNISCH ,  Feras EID ,  Adel A. ELSHERBINI ,  Johanna M. SWAN ,  Don W. NELSON

IPC: H01L23/367 ,  H01L21/52 ,  H01L23/498

CPC classification number: H01L23/3675 ,  H01L21/52 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/473 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5389 ,  H01L2924/0002 ,  H05K1/021 ,  H05K1/185 ,  H05K2201/066 ,  H05K2201/10416 ,  H05K2201/10545 ,  H01L2924/00

Abstract: An apparatus including a die, a first side of the die including a first type of system level contact points and a second side including a second type of contact points; and a package substrate coupled to the die and the second side of the die. An apparatus including a die, a first side of the die including a plurality of system level logic contact points and a second side including a second plurality of system level power contact points. A method including coupling one of a first type of system level contact points on a first side of a die and a second type of system level contact points on a second side of the die to a package substrate.

Abstract translation: 一种包括模具的设备，所述模具的第一侧包括第一类型的系统级接触点和包括第二类型的接触点的第二侧; 以及耦合到管芯和管芯的第二侧的封装衬底。 一种包括管芯的设备，所述管芯的第一侧包括多个系统级逻辑接触点和包括第二多个系统级电力接触点的第二侧。 一种方法，包括将管芯的第一侧上的第一类型的系统级接触点中的一个与管芯的第二侧上的第二类型的系统级接触点耦合到封装衬底。