公开(公告)号：US20180095884A1

公开(公告)日：2018-04-05

申请号：US15282478

申请日：2016-09-30

Applicant: INTEL CORPORATION

Inventor： Maciej KAMINSKI ,  Piotr WYSOCKI ,  Slawomir PTAK

IPC: G06F12/0873 ,  G06F3/06 ,  G06F12/0804 ,  G06F12/0868

CPC classification number: G06F12/0873 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/068 ,  G06F12/0804 ,  G06F12/0868 ,  G06F2212/1024 ,  G06F2212/205 ,  G06F2212/221 ,  G06F2212/2228 ,  G06F2212/224 ,  G06F2212/271 ,  G06F2212/284 ,  G06F2212/3042 ,  G06F2212/305 ,  G06F2212/313

Abstract: An apparatus is described. The apparatus includes a memory controller comprising logic circuitry to implement a mass storage cache in a non volatile region of a system memory. The non volatile region of the system memory is to support execution of program code directly out of the non volatile region system memory.