公开(公告)号：US20240213250A1

公开(公告)日：2024-06-27

申请号：US18088547

申请日：2022-12-24

Applicant: INTEL CORPORATION

Inventor： Shao Ming KOH ,  Sudipto NASKAR ,  Leonard P. GULER ,  Patrick MORROW ,  Richard E. SCHENKER ,  Walid M. HAFEZ ,  Charles H. WALLACE ,  Mohit K. HARAN ,  Jeanne L. LUCE ,  Dan S. LAVRIC ,  Jack T. KAVALIEROS ,  Matthew PRINCE ,  Lars LIEBMANN

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/786

CPC classification number: H01L27/0924 ,  H01L29/0673 ,  H01L29/78696

Abstract: Embodiments disclosed herein include forksheet transistor transistors with self-aligned backbones. In an example, an integrated circuit structure includes a backbone including a lower backbone portion distinct from an upper backbone portion. A first vertical stack of nanowires is in lateral contact with a first side of the backbone. A second vertical stack of nanowires is in lateral contact with a second side of the backbone, the second side opposite the first side.