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公开(公告)号:US11599154B2
公开(公告)日:2023-03-07
申请号:US17460983
申请日:2021-08-30
Applicant: Intel Corporation
Inventor: Min Liu , Lakshman Krishnamurthy , David L. Graumann , Jameson H. Williams , Miriam K. Selvaraj , Bryan R. Peebler , Wendy A. March , Brian K. Vogel , Wenbo Shen , Sihua Tian , Lijuan Xiao , Tao Wang , Xiaoyan Dang , Nithyananda S. Jeganathan , Sunil A. Kulkarni , Sherman Chan Wai Lee , Kaining Yuan
IPC: G06F3/044 , G06F1/16 , G06F3/04815 , G06F3/04883 , G06F3/04842 , G06F3/0488
Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
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公开(公告)号:US11106246B2
公开(公告)日:2021-08-31
申请号:US17092783
申请日:2020-11-09
Applicant: Intel Corporation
Inventor: Min Liu , Lakshman Krishnamurthy , David L. Graumann , Jameson H. Williams , Miriam K. Selvaraj , Bryan R. Peebler , Wendy A. March , Brian K. Vogel , Wenbo Shen , Sihua Tian , Lijuan Xiao , Tao Wang , Xiaoyan Dang , Nithyananda S. Jeganathan , Sunil A. Kulkarni , Sherman Chan Wai Lee , Kaining Yuan
IPC: G06F3/044 , G06F1/16 , G06F3/0481 , G06F3/0488 , G06F3/0484
Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
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公开(公告)号:US09407756B2
公开(公告)日:2016-08-02
申请号:US14040646
申请日:2013-09-28
Applicant: Intel Corporation
Inventor: Min Liu
CPC classification number: H04M3/02 , H04M1/72569 , H04M3/436 , H04M19/04 , H04M2250/12 , H04M2250/22
Abstract: In one example a controller comprises logic, at least partially including hardware logic, configured to receive a notification of an incoming event and terminate the notification in response to at least one of a predetermined motion applied to the controller or a predetermined touch applied to a touch surface. Other examples may be described.
Abstract translation: 在一个示例中,控制器包括至少部分地包括硬件逻辑的逻辑,其被配置为响应于施加到控制器的预定运动或应用于触摸的预定触摸中的至少一个来接收进入事件的通知并终止通知 表面。 可以描述其他示例。
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公开(公告)号:US20220057841A1
公开(公告)日:2022-02-24
申请号:US17460983
申请日:2021-08-30
Applicant: Intel Corporation
Inventor: Min Liu , Lakshman Krishnamurthy , David L. Graumann , Jameson H. Williams , Miriam K. Selvaraj , Bryan R. Peebler , Wendy A. March , Brian K. Vogel , Wenbo Shen , Sihua Tian , Lijuan Xiao , Tao Wang , Xiaoyan Dang , Nithyananda S. Jeganathan , Sunil A. Kulkarni , Sherman Chan Wai Lee , Kaining Yuan
IPC: G06F1/16 , G06F3/0481 , G06F3/0488 , G06F3/044 , G06F3/0484
Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
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公开(公告)号:US20210132665A1
公开(公告)日:2021-05-06
申请号:US17092783
申请日:2020-11-09
Applicant: Intel Corporation
Inventor: Min Liu , Lakshman Krishnamurthy , David L. Graumann , Jameson H. Williams , Miriam K. Selvaraj , Bryan R. Peebler , Wendy A. March , Brian K. Vogel , Wenbo Shen , Sihua Tian , Lijuan Xiao , Tao Wang , Xiaoyan Dang , Nithyananda S. Jeganathan , Sunil A. Kulkarni , Sherman Chan Wai Lee , Kaining Yuan
IPC: G06F1/16 , G06F3/0481 , G06F3/0488 , G06F3/044 , G06F3/0484
Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
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公开(公告)号:US10831318B2
公开(公告)日:2020-11-10
申请号:US15038657
申请日:2013-12-24
Applicant: Intel Corporation
Inventor: Min Liu , Lakshman Krishnamurthy , David L. Graumann , Jameson H. Williams , Miriam K. Selvaraj , Bryan R. Peebler , Wendy A. March , Brian K. Vogel , Wenbo Shen , Sihua Tian , Lijuan Xiao , Tao Wang , Xiaoyan Dang , Nithyananda S. Jeganathan , Sunil A. Kulkarni , Chan Wai Lee , Kaining Yuan
IPC: G06F3/044 , G06F1/16 , G06F3/0481 , G06F3/0488 , G06F3/0484
Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
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公开(公告)号:US09495017B2
公开(公告)日:2016-11-15
申请号:US14359459
申请日:2013-11-20
Applicant: INTEL CORPORATION
Inventor: Wendy March , Jameson H. Williams , Mei Lu , Todd S. Harple , Bryan R. Peebler , Benjamin S. Weigand , Mariano J. Phielipp , Min Liu
CPC classification number: G06F3/03 , G06F1/1684 , G06F3/017 , G06F3/0346 , G06F3/165 , G06F3/167 , G06F2200/1637 , H04N5/23216 , H04N5/23258
Abstract: Embodiments of computing systems, and related methods, are disclosed herein. In some embodiments, a computing system may include a peripheral device (e.g., an image capture device and/or an audio output device) and control logic. The control logic may be coupled with a sensor system and the peripheral device to receive a trigger signal; receive, from the sensor system, one or more interaction signals indicative of a user interaction with the computing system; and, in response to receipt of the trigger signal and the one or more interaction signals, generate a control signal for output to the peripheral device to control operation of the peripheral device. Other embodiments may be disclosed and/or claimed.
Abstract translation: 计算系统和相关方法的实施例在此公开。 在一些实施例中,计算系统可以包括外围设备(例如,图像捕获设备和/或音频输出设备)和控制逻辑。 控制逻辑可以与传感器系统和外围设备耦合以接收触发信号; 从所述传感器系统接收指示与所述计算系统的用户交互的一个或多个交互信号; 并且响应于接收到所述触发信号和所述一个或多个交互信号,产生用于输出到所述外围设备的控制信号以控制所述外围设备的操作。 可以公开和/或要求保护其他实施例。
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公开(公告)号:US20230280793A1
公开(公告)日:2023-09-07
申请号:US18117887
申请日:2023-03-06
Applicant: Intel Corporation
Inventor: Min Liu , Lakshman Krishnamurthy , David L. Graumann , Jameson H. Williams , Miriam K. Selvaraj , Bryan R. Peebler , Wendy A. March , Brian K. Vogel , Wenbo Shen , Sihua Tian , Lijuan Xiao , Tao Wang , Xiaoyan Dang , Nithyananda S. Jeganathan , Sunil A. Kulkarni , Sherman Chan Wai Lee , Kaining Yuan
IPC: G06F1/16 , G06F3/04815 , G06F3/04883 , G06F3/044 , G06F3/04842 , G06F3/0488
CPC classification number: G06F1/1656 , G06F3/044 , G06F3/0445 , G06F3/04815 , G06F3/04842 , G06F3/0488 , G06F3/04883 , G06F2200/1636 , G06F2203/04101 , G06F2203/04808
Abstract: A device includes an enclosure and logic. The enclosure includes a plurality of capacitive touch sensor arrays disposed at least on two of a top side, a bottom side, a left side, a right side, a front side, and a back side of the device. The enclosure also includes a first display on the front side of the device. The logic receives touch interaction information from the plurality of capacitive touch sensor arrays and initiates an action based at least in part on the touch interaction information.
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公开(公告)号:US09244578B2
公开(公告)日:2016-01-26
申请号:US14128562
申请日:2013-09-12
Applicant: INTEL CORPORATION
Inventor: Min Liu
CPC classification number: G06F3/044 , G06F1/1692 , G06F3/01 , G06F3/041 , G06F3/0418 , G06F3/04883 , G06F2203/04108
Abstract: Embodiments of apparatus and methods for detecting gestures are described. In embodiments, an apparatus may include a transmitter-receiver electrode arrangement to generate an electric field projecting beyond a side of a computing device, so that changes to the electric field caused by user gestures on or near the outer surface of the side may be sensed. The transmitter-receiver electrode arrangement may include at least a transmitter and a receiver that are different, but complementary in geometry and disposition, disposed relative to an inner surface of the side of the computing device. Moreover, a capacitive sensor may be disposed in the computing device to output electrical signals indicative of changes to the electric field sensed. Other embodiments may be described and/or claimed.
Abstract translation: 描述用于检测手势的装置和方法的实施例。 在实施例中,装置可以包括发射器 - 接收器电极装置,用于产生超出计算装置侧面的电场,使得可以感测到由侧面的外表面上或其附近的用户手势导致的对电场的改变 。 发射器 - 接收器电极装置可以至少包括相对于计算装置的侧面的内表面布置的不同的,但在几何形状和布局上互补的发射器和接收器。 此外,电容传感器可以设置在计算设备中以输出指示对所感测的电场的变化的电信号。 可以描述和/或要求保护其他实施例。
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公开(公告)号:US20230042495A1
公开(公告)日:2023-02-09
申请号:US17967037
申请日:2022-10-17
Applicant: Intel Corporation
Inventor: Min Liu , Young Xiangguo Guo , Lei Zhu , Yannan Sun , Xiang Li
IPC: G06F3/06
Abstract: In coarse memory training approaches, a multiple of a base timing interval is used to reduce the sampling time in a sweep sampling approach during memory training to determine the timing offset between a non-clock memory signal and a memory clock to ensure reliable memory operation at high frequencies. In a hierarchical memory training method, a coarse memory training step is employed to determine adjustable timing offsets where a memory captures the rising and falling edges of a non-clock memory signal and those adjustable timing offsets are used in a subsequent fine memory training step to refine the timing offsets where the memory captures the rising and falling edges of the non-clock memory signal. The hierarchical approach can determine timing offsets for non-clock memory signals with the accuracy of existing (non-coarse, non-hierarchical) memory training methods in less time than the existing methods.
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