公开(公告)号：US11853784B2

公开(公告)日：2023-12-26

申请号：US16463473

申请日：2016-12-22

Applicant: INTEL CORPORATION

Inventor： Yigang Zhou ,  Cunming Liang

IPC: G06F9/455 ,  G06F12/0802 ,  G06F13/24 ,  G06F13/28

CPC classification number: G06F9/4555 ,  G06F9/45545 ,  G06F9/45558 ,  G06F12/0802 ,  G06F13/24 ,  G06F13/28 ,  G06F2009/4557 ,  G06F2009/45583 ,  G06F2009/45595 ,  G06F2213/3808

Abstract: An example electronic apparatus is for accelerating a para-virtualization network interface. The electronic apparatus includes a descriptor hub performing bi-directionally communication with a guest memory accessible by a guest and with a host memory accessible by a host. The guest includes a plurality of virtual machines. The host includes a plurality of virtual function devices. The virtual machines are communicatively coupled to the electronic apparatus through a central processing unit. The communication is based upon para-virtualization packet descriptors and network interface controller virtual function-specific descriptors. The electronic apparatus also includes a device association table communicatively coupled to the descriptor hub and to store associations between the virtual machines and the virtual function devices. The electronic apparatus further includes an input-output memory map unit (IOMMU) to perform direct memory access (DMA) remapping and interrupt remapping.