公开(公告)号：US20190165128A1

公开(公告)日：2019-05-30

申请号：US16100317

申请日：2018-08-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： SEYOUNG KIM ,  CHOONGHYUN LEE ,  INJO OK ,  SOON-CHEON SEO

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/10 ,  H01L29/737 ,  H01L29/732 ,  H01L21/324 ,  H01L21/308 ,  H01L21/306 ,  H01L29/165

CPC classification number: H01L29/66242 ,  H01L21/02112 ,  H01L21/0228 ,  H01L21/02532 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/324 ,  H01L29/0684 ,  H01L29/0817 ,  H01L29/1004 ,  H01L29/165 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/737 ,  H01L29/7371 ,  H01L29/7378 ,  H01L2924/1305

Abstract: A method of manufacturing a bipolar junction transistor (BJT) structure is provided. Pattern etching through a second semiconductor layer and recessing a silicon germanium layer are performed to form a plurality of vertical fins each including a silicon germanium pattern, a second semiconductor pattern and a hard mask pattern sequentially stacked on a first semiconductor layer above a substrate. First spacers are formed on sidewalls of the plurality of vertical fins. Exposed silicon germanium layer above the first semiconductor layer is directionally etched away. A germanium oxide layer is conformally coated to cover all exposed top and sidewall surfaces. Condensation annealing followed by silicon oxide strip is performed. The first spacers, remaining germanium oxide layer and the hard mask pattern are removed. A dielectric material is deposited to isolate the plurality of vertical fins. An emitter, a base and a collector contacts are formed to connect to the second semiconductor pattern, the silicon germanium pattern and the first semiconductor layer, respectively. The BJT structures manufactured are also provided.