公开(公告)号：US20170213736A1

公开(公告)日：2017-07-27

申请号：US15483273

申请日：2017-04-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： JOEL P. de SOUZA ,  BAHMAN HEKMATSHOARTABARI ,  JEEHWAN KIM ,  SIEGFRIED L. MAURER ,  DEVENDRA K. SADANA

IPC: H01L21/283 ,  H01L29/66 ,  H01L29/40 ,  H01L21/3213 ,  H01L29/08

CPC classification number: H01L21/283 ,  A23C9/123 ,  A23C9/1315 ,  A23C11/08 ,  H01L21/2254 ,  H01L21/28114 ,  H01L21/30604 ,  H01L21/3213 ,  H01L21/32131 ,  H01L21/32133 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/66446 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

Abstract: A method for forming a semiconductor device includes patterning a gate conductor, formed on a substrate, and a two-dimensional material formed on the gate conductor. Recesses are formed adjacent to the gate conductor in the substrate, and a doped layer is deposited in the recesses and over a top of the two-dimensional material. Tape is adhered to the doped layer on top of the two-dimensional material. The tape is removed to exfoliate the doped layer from the top of the two-dimensional material to form source and drain regions in the recesses.

公开(公告)号：US20160336424A1

公开(公告)日：2016-11-17

申请号：US15223988

申请日：2016-07-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： JOEL P. de SOUZA ,  BAHMAN HEKMATSHOARTABARI ,  JEEHWAN KIM ,  SIEGFRIED L. MAURER ,  DEVENDRA K. SADANA

IPC: H01L29/66 ,  H01L21/283 ,  H01L21/306

CPC classification number: H01L21/283 ,  A23C9/123 ,  A23C9/1315 ,  A23C11/08 ,  H01L21/2254 ,  H01L21/28114 ,  H01L21/30604 ,  H01L21/3213 ,  H01L21/32131 ,  H01L21/32133 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/66446 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

Abstract: A method for forming a semiconductor device includes patterning a gate conductor, formed on a substrate, and a two-dimensional material formed on the gate conductor. Recesses are formed adjacent to the gate conductor in the substrate, and a doped layer is deposited in the recesses and over a top of the two-dimensional material. Tape is adhered to the doped layer on top of the two-dimensional material. The tape is removed to exfoliate the doped layer from the top of the two-dimensional material to form source and drain regions in the recesses.

Abstract translation: 一种用于形成半导体器件的方法包括图案化形成在基底上的栅极导体和形成在栅极导体上的二维材料。 在衬底中形成与栅极导体相邻的凹陷，并且掺杂层沉积在凹部中并在二维材料的顶部上。 胶带粘附在二维材料顶部的掺杂层上。 去除带以从二维材料的顶部剥离掺杂层以在凹槽中形成源区和漏区。

公开(公告)号：US20160336418A1

公开(公告)日：2016-11-17

申请号：US15224035

申请日：2016-07-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： JOEL P. de SOUZA ,  BAHMAN HEKMATSHOARTABARI ,  JEEHWAN KIM ,  SIEGFRIED L. MAURER ,  DEVENDRA K. SADANA

IPC: H01L29/423 ,  H01L29/40

CPC classification number: H01L21/283 ,  A23C9/123 ,  A23C9/1315 ,  A23C11/08 ,  H01L21/2254 ,  H01L21/28114 ,  H01L21/30604 ,  H01L21/3213 ,  H01L21/32131 ,  H01L21/32133 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/66446 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

Abstract: A method for forming a semiconductor device includes patterning a gate conductor, formed on a substrate, and a two-dimensional material formed on the gate conductor. Recesses are formed adjacent to the gate conductor in the substrate, and a doped layer is deposited in the recesses and over a top of the two-dimensional material. Tape is adhered to the doped layer on top of the two-dimensional material. The tape is removed to exfoliate the doped layer from the top of the two-dimensional material to form source and drain regions in the recesses.

公开(公告)号：US20160268395A1

公开(公告)日：2016-09-15

申请号：US14656371

申请日：2015-03-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： JOEL P. de SOUZA ,  BAHMAN HEKMATSHOARTABARI ,  JEEHWAN KIM ,  SIEGFRIED L. MAURER ,  DEVENDRA K. SADANA

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/78 ,  H01L29/423 ,  H01L21/3213

CPC classification number: H01L21/283 ,  A23C9/123 ,  A23C9/1315 ,  A23C11/08 ,  H01L21/2254 ,  H01L21/28114 ,  H01L21/30604 ,  H01L21/3213 ,  H01L21/32131 ,  H01L21/32133 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/66446 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

Abstract: A method for forming a semiconductor device includes patterning a gate conductor, formed on a substrate, and a two-dimensional material formed on the gate conductor. Recesses are formed adjacent to the gate conductor in the substrate, and a doped layer is deposited in the recesses and over a top of the two-dimensional material. Tape is adhered to the doped layer on top of the two-dimensional material. The tape is removed to exfoliate the doped layer from the top of the two-dimensional material to form source and drain regions in the recesses.