公开(公告)号：US10361116B2

公开(公告)日：2019-07-23

申请号：US15926274

申请日：2018-03-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hsueh-Chung Chen ,  Cheng Chi ,  Lin Hu ,  Kafai Lai ,  Chi-Chun Liu ,  Jed W. Pitera

IPC: H01L21/768 ,  H01L21/02 ,  G06F17/50 ,  H01L23/528 ,  H01L23/522 ,  H01L21/027

Abstract: A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.

公开(公告)号：US20180211869A1

公开(公告)日：2018-07-26

申请号：US15926274

申请日：2018-03-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hsueh-Chung Chen ,  Cheng Chi ,  Lin Hu ,  Kafai Lai ,  Chi-Chun Liu ,  Jed W. Pitera

IPC: H01L21/768 ,  H01L21/02 ,  G06F17/50 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L21/76816 ,  G06F17/5072 ,  H01L21/02118 ,  H01L21/02318 ,  H01L23/5226 ,  H01L23/528

Abstract: A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.

公开(公告)号：US09984920B2

公开(公告)日：2018-05-29

申请号：US15206789

申请日：2016-07-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hsueh-Chung Chen ,  Cheng Chi ,  Lin Hu ,  Kafai Lai ,  Chi-Chun Liu ,  Jed W. Pitera

IPC: G06F17/50 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L21/02

CPC classification number: H01L21/76816 ,  G06F17/5072 ,  H01L21/02118 ,  H01L21/02318 ,  H01L23/5226 ,  H01L23/528

Abstract: A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.

公开(公告)号：US20180012795A1

公开(公告)日：2018-01-11

申请号：US15206789

申请日：2016-07-11

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hsueh-Chung Chen ,  Cheng Chi ,  Lin Hu ,  Kafai Lai ,  Chi-Chun Liu ,  Jed W. Pitera

IPC: H01L21/768 ,  H01L21/02 ,  G06F17/50 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L21/76816 ,  G06F17/5072 ,  H01L21/02118 ,  H01L21/02318 ,  H01L23/5226 ,  H01L23/528

Abstract: A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.