公开(公告)号：US20230133157A1

公开(公告)日：2023-05-04

申请号：US17453516

申请日：2021-11-04

Applicant: International Business Machines Corporation

Inventor： Ruilong XIE ,  Takeshi NOGAMI ,  Roy R. YU ,  Balasubramanian PRANATHARTHIHARAN ,  Chih-Chao YANG

IPC: H01L23/528 ,  H01L23/50 ,  H01L21/768 ,  H01L23/522 ,  H01L49/02

Abstract: A method of fabricating a semiconductor device comprises forming backside power rails in a dielectric layer arranged above a backside interlayer dielectric (BILD) layer or a semiconductor layer, forming a trench that extends through the BILD layer or the semiconductor layer and partly through the dielectric layer between the backside power rails, depositing a plurality of layers to form a backside metal-insulator-metal (MIM) capacitor in the trench, and forming a first contact to a first metal layer of the plurality of layers. Forming the first contact comprises forming first recesses in a second metal layer of the plurality of layers, and filling the first recesses with an insulative material. The method further comprises forming a second contact to the second metal layer. Forming the second contact comprises forming second recesses in the first metal layer, and filling the second recesses with the insulative material.

公开(公告)号：US20160056076A1

公开(公告)日：2016-02-25

申请号：US14466539

申请日：2014-08-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/02068 ,  H01L21/02172 ,  H01L21/02244 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

公开(公告)号：US20230093101A1

公开(公告)日：2023-03-23

申请号：US17481706

申请日：2021-09-22

Applicant: International Business Machines Corporation

Inventor： Ruilong XIE ,  Brent ANDERSON ,  Albert M. YOUNG ,  Kangguo CHENG ,  Julien FROUGIER ,  Balasubramanian PRANATHARTHIHARAN ,  Roy R. YU ,  Takeshi NOGAMI

IPC: H01L29/40 ,  H01L29/165 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L23/528 ,  H01L23/522 ,  H01L21/762 ,  H01L21/84

Abstract: A semiconductor device includes a dielectric isolation layer, a plurality of gates formed above the dielectric isolation layer, a plurality of source/drain regions above the dielectric isolation layer between the plurality of gates, and at least one contact placeholder for a backside contact. The at least one contact placeholder contacts a bottom surface of a first source/drain region of the plurality of source/drain regions. The semiconductor device further includes at least one backside contact contacting a bottom surface of a second source/drain region of the plurality of source/drain regions, and a buried power rail arranged beneath, and contacting the at least one backside contact.

公开(公告)号：US20160329279A1

公开(公告)日：2016-11-10

申请号：US15214760

申请日：2016-07-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/02068 ,  H01L21/02172 ,  H01L21/02244 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

公开(公告)号：US20160056112A1

公开(公告)日：2016-02-25

申请号：US14882568

申请日：2015-10-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L23/532 ,  H01L23/528

CPC classification number: H01L21/76879 ,  H01L21/02068 ,  H01L21/02172 ,  H01L21/02244 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

Abstract translation: 公开了低电容和高可靠性互连结构和制造方法。 该方法包括在电介质材料的开口中形成铜基互连结构。 该方法还包括在铜基互连结构上形成覆盖层。 该方法还包括氧化覆盖层和形成在电介质材料的表面上的任何残留材料。 该方法还包括通过从铜基互连结构向包覆层的表面外扩散材料，在封盖层上形成阻挡层。 该方法还包括去除残留材料，同时覆盖层表面上的阻挡层保护覆盖层。

公开(公告)号：US20180090371A1

公开(公告)日：2018-03-29

申请号：US15825646

申请日：2017-11-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02

CPC classification number: H01L21/76879 ,  H01L21/02068 ,  H01L21/02172 ,  H01L21/02244 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

公开(公告)号：US20170140981A1

公开(公告)日：2017-05-18

申请号：US15417390

申请日：2017-01-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02

CPC classification number: H01L21/76879 ,  H01L21/02068 ,  H01L21/02172 ,  H01L21/02244 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

公开(公告)号：US20200051854A1

公开(公告)日：2020-02-13

申请号：US16657169

申请日：2019-10-18

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L21/768 ,  H01L21/02 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

公开(公告)号：US20180374748A1

公开(公告)日：2018-12-27

申请号：US16118998

申请日：2018-08-31

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/02 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L21/76879 ,  H01L21/02068 ,  H01L21/02172 ,  H01L21/02244 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.

公开(公告)号：US20180082894A1

公开(公告)日：2018-03-22

申请号：US15825889

申请日：2017-11-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. EDELSTEIN ,  Son V. NGUYEN ,  Takeshi NOGAMI ,  Deepika PRIYADARSHINI ,  Hosadurga K. SHOBHA

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L23/522 ,  H01L21/02

CPC classification number: H01L21/76879 ,  H01L21/02068 ,  H01L21/02172 ,  H01L21/02244 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76888 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low capacitance and high reliability interconnect structures and methods of manufacture are disclosed. The method includes forming a copper based interconnect structure in an opening of a dielectric material. The method further includes forming a capping layer on the copper based interconnect structure. The method further includes oxidizing the capping layer and any residual material formed on a surface of the dielectric material. The method further includes forming a barrier layer on the capping layer by outdiffusing a material from the copper based interconnect structure to a surface of the capping layer. The method further includes removing the residual material, while the barrier layer on the surface of the capping layer protects the capping layer.