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公开(公告)号:USD932438S1
公开(公告)日:2021-10-05
申请号:US29719160
申请日:2019-12-31
设计人: Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn , Jae Ku Park , Sung Hee Wang , Eun Bin Lee
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公开(公告)号:USD932437S1
公开(公告)日:2021-10-05
申请号:US29719158
申请日:2019-12-31
设计人: Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn , Jae Ku Park , Sung Hee Wang , Eun Bin Lee
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公开(公告)号:USD932436S1
公开(公告)日:2021-10-05
申请号:US29719157
申请日:2019-12-31
设计人: Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn , Jae Ku Park , Sung Hee Wang , Eun Bin Lee
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公开(公告)号:US09767450B2
公开(公告)日:2017-09-19
申请号:US15008506
申请日:2016-01-28
发明人: Hyeok Hwi Na , Ho Seok Hwang , Young Seok Kim , Seong Beom Park , Sang Hoon Ahn , Sun Ho Kim
IPC分类号: G06K7/10 , G06Q20/34 , H02J7/02 , G06Q20/32 , G07F7/08 , G07F7/10 , H02J50/80 , H04B5/00 , H02J50/12 , H01Q7/00
CPC分类号: G06Q20/352 , G06K7/10297 , G06K7/10326 , G06Q20/3278 , G07F7/0806 , G07F7/1008 , H01Q7/00 , H02J7/025 , H02J50/12 , H02J50/80 , H04B5/0031
摘要: Provided is an antenna module package including a substrate, a wireless card payment antenna structure mounted on the substrate and including a first antenna chip and wireless card payment matching elements electrically connected to the first antenna chip, a near field communication (NFC) antenna structure mounted on the substrate, sharing the first antenna chip, and including an extended NFC antenna loop and NFC matching elements electrically connected to the first antenna chip, and a wireless charging antenna structure mounted on the substrate and including a second antenna chip, and an extended wireless charging antenna loop and wireless charging matching elements electrically connected to the second antenna chip.
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公开(公告)号:US09680973B2
公开(公告)日:2017-06-13
申请号:US14972324
申请日:2015-12-17
发明人: Hyeok Hwi Na , Ho Seok Hwang , Young Seok Kim , Seong Beom Park , Sang Hoon Ahn , Sun Ho Kim
CPC分类号: H04M1/026 , H01L2224/48145 , H01L2224/4903 , H01L2924/19105 , H01Q1/38 , H01Q7/00 , H04M2250/04 , H01L2924/00012
摘要: Disclosed is an electronic device capable of near field communication (NFC) and of achieving high integration, size reduction, and good sensitivity. The electronic device includes an antenna chip provided inside a battery protection circuit package of a battery pack and having embedded an NFC antenna therein, and an extended antenna loop electrically connected to the antenna chip and provided outside the battery protection circuit package.
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公开(公告)号:US11375623B2
公开(公告)日:2022-06-28
申请号:US16907474
申请日:2020-06-22
发明人: Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn , Jae Ku Park , Sung Hee Wang , Eun Bin Lee
IPC分类号: H05K3/34 , H01M50/572 , H01L23/495 , H01M10/42 , H02J7/00 , H05K1/11 , H05K3/28
摘要: A method of fabricating a battery protection circuit package according to one aspect of the present invention includes forming a first mounting structure by mounting battery protection circuit elements on a printed circuit board (PCB), forming a second mounting structure by mounting the first mounting structure on a lead frame which comprises an input/output terminal portion for external connection and at least one metal tab for battery cell connection, forming an encapsulation structure by encapsulating the second mounting structure with a molding material to encapsulate at least a part of the battery protection circuit elements while exposing the input/output terminal portion and the at least one metal tab of the lead frame, and bonding at least one flexible printed circuit board (FPCB) to the input/output terminal portion of the encapsulation structure.
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公开(公告)号:US10756550B2
公开(公告)日:2020-08-25
申请号:US15749635
申请日:2016-08-11
发明人: Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn
摘要: According to an aspect of the present invention, there is provided a battery protection circuit module including a first positive terminal and a first negative terminal electrically connected to electrode terminals of a battery bare cell, a second positive terminal and a second negative terminal electrically connected to a charger or an electronic device, a single field-effect transistor including a drain terminal, a source terminal, a gate terminal, and a well terminal, wherein the drain terminal is electrically connected to the first negative terminal and the source terminal is electrically connected to the second negative terminal, and a protection integrated circuit (P-IC) for controlling charging/discharging of the battery bare cell by controlling the gate terminal to control whether to switch on the single field-effect transistor and controlling a bias voltage of the well terminal by using an internal switch.
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公开(公告)号:USD930588S1
公开(公告)日:2021-09-14
申请号:US29719150
申请日:2019-12-31
设计人: Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn , Jae Ku Park , Sung Hee Wang , Eun Bin Lee
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公开(公告)号:US10283981B2
公开(公告)日:2019-05-07
申请号:US15640699
申请日:2017-07-03
发明人: Shuhei Abe , Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn
IPC分类号: H02J7/00 , H01L23/535 , H01L27/088 , H03K17/16 , H03K17/06 , H01L27/02
摘要: A protection IC includes a bias output terminal connected to a back gate of a MOS transistor, a load side terminal connected to a power supply path between a load and the MOS transistor, a load side switch inserted in an electric current path connecting the bias output terminal and the load side terminal, and a control circuit configured to control the load side switch based on a state of a secondary battery and thereby cause a back gate control signal for controlling a voltage of the back gate to be output from the bias output terminal. The load side switch is formed on an N-type silicon substrate and includes at least two NMOS transistors whose drains are connected to each other, and the control circuit is configured to simultaneously turn on or turn off the two NMOS transistors based on the state of the secondary battery.
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公开(公告)号:US10090690B2
公开(公告)日:2018-10-02
申请号:US15640713
申请日:2017-07-03
发明人: Shuhei Abe , Hyuk Hwi Na , Ho Seok Hwang , Young Seok Kim , Sang Hoon Ahn
IPC分类号: H02J7/00
摘要: A secondary battery protection circuit includes a first terminal connected to a power supply path between a secondary battery and a MOS transistor, a second terminal connected to the power supply path between a load and the MOS transistor, a third terminal connected to a gate of the MOS transistor, a fourth terminal connected to a back gate of the MOS transistor, a control circuit that outputs a switch control signal based on a detected abnormal state of the secondary battery, and a switch control circuit including a first switch for connecting the fourth terminal with the first terminal and a second switch for connecting the fourth terminal with the second terminal. At least one of the resistance between the fourth terminal and the first terminal and the resistance between the fourth terminal and the second terminal is greater than the on resistance value of the MOS transistor.
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