公开(公告)号：US06873280B2

公开(公告)日：2005-03-29

申请号：US10459750

申请日：2003-06-12

申请人： Ian Stuart Robinson ,  Jeffrey Mark Hinrichs ,  Kenneth Weber ,  Jasmine Upendra Patel ,  Paul Charles MacFalda ,  William Marvin Skones

发明人： Ian Stuart Robinson ,  Jeffrey Mark Hinrichs ,  Kenneth Weber ,  Jasmine Upendra Patel ,  Paul Charles MacFalda ,  William Marvin Skones

IPC分类号： H03M3/02 ,  H03M3/00 ,  H03M7/00 ,  H03M1/36

CPC分类号： H03M3/50

摘要： Signal conversion of an input signal can be achieved by processing portions of the signal through plural parallel paths, which collectively approximate a desired infinite impulse response (IIR) filter, either alone or implemented with other signal processing functions. In one aspect, each of the paths can perform filtering, noise-shaping and/or quantization on a respective portion of the input signal to provide a corresponding representation of the respective portion of the input signal, for example, a coarser representation at a higher data rate. The corresponding representations from the parallel paths can be aggregated and further processed in a desired manner, such as conversion to an analog signal.

摘要翻译： 输入信号的信号转换可以通过处理多个并行路径的信号的部分来实现，这些并行路径共同接近期望的无限脉冲响应（IIR）滤波器，或单独地或者用其它信号处理功能实现。 在一个方面，每个路径可以在输入信号的相应部分上执行滤波，噪声整形和/或量化，以提供输入信号的相应部分的相应表示，例如，较高的 数据速率。 来自并行路径的相应表示可以以期望的方式聚合和进一步处理，例如转换为模拟信号。

公开(公告)号：US07190288B2

公开(公告)日：2007-03-13

申请号：US10608932

申请日：2003-06-27

申请人： Ian Stuart Robinson ,  Jeffrey Mark Hinrichs ,  Jasmine Upendra Patel ,  Paul Charles MacFalda ,  Reza Dehmohseni ,  Frederic J. Harris ,  Kenneth Weber

发明人： Ian Stuart Robinson ,  Jeffrey Mark Hinrichs ,  Jasmine Upendra Patel ,  Paul Charles MacFalda ,  Reza Dehmohseni ,  Frederic J. Harris ,  Kenneth Weber

IPC分类号： H03M7/00

CPC分类号： H03M7/3015

摘要： Signal conversion is implemented employing a memory system operating as a look-up table that stores a plurality of sets of output samples associated with each of a plurality of respective input samples. The look-up table thus can generate a corresponding set of output samples in response to a given input sample, thereby emulating desired digital upsampling and delta-sigma modulation. The output samples can be aggregated, such as by multiplexing, to provide an output data stream at a desired sample rate.

摘要翻译： 使用作为查找表操作的存储器系统来实现信号转换，所述查找表存储与多个相应输入样本中的每一个相关联的多组输出采样。 因此，查找表可以响应于给定的输入采样产生相应的一组输出样本，从而仿真期望的数字上采样和Δ-Σ调制。 输出样本可以聚合，例如通过多路复用，以提供期望采样率的输出数据流。

公开(公告)号：US07130327B2

公开(公告)日：2006-10-31

申请号：US10608926

申请日：2003-06-27

申请人： Ian Stuart Robinson ,  Jeffrey Mark Hinrichs ,  Kenneth Weber

发明人： Ian Stuart Robinson ,  Jeffrey Mark Hinrichs ,  Kenneth Weber

IPC分类号： H04B1/69 ,  H04B1/707 ,  H04B1/713

CPC分类号： H03M7/3015 ,  G06F1/0321

摘要： Frequency synthesis is implemented by providing a delta-sigma modulated signal associated with a selected frequency, which frequency can vary based on a selection input. The delta-sigma modulated signal is converted from the digital to analog domain. The delta-sigma modulated signal can be provided directly from memory based on the selection input or, alternatively, it can be provided by a signal generator and processed by a delta-sigma modulator to provide the delta-sigma modulated signal. The selected frequency can be varied at a high rate of speed.

摘要翻译： 通过提供与所选频率相关联的Δ-Σ调制信号来实现频率合成，该频率可以基于选择输入而变化。 Δ-Σ调制信号从数字转换为模拟域。 Δ-Σ调制信号可以基于选择输入从存储器直接提供，或者可以由信号发生器提供并由Δ-Σ调制器处理以提供Δ-Σ调制信号。 所选择的频率可以以高速度变化。

公开(公告)号：US07607553B2

公开(公告)日：2009-10-27

申请号：US11233953

申请日：2005-09-23

申请人： Kenneth Weber

发明人： Kenneth Weber

IPC分类号： B65D45/00 ,  B65D6/28 ,  H02G3/08 ,  H01R13/512

CPC分类号： H02G3/086

摘要： The invention relates to a lower portion of an electric and electronic enclosure, comprising a bottom and fastening arrangements for fastening a cover to the lower portion with a bayonet-like fastening, the fastening arrangements comprising a bore and a shoulder-like stopper for receiving a mounting bracket of a spindle-like element. So as to be able to fasten the cover to the lower portion with either bayonet snap lock means or conventional screws, the bore of the lower portion comprises threads for receiving the screw. The invention also relates to an electric and electronic enclosure.

摘要翻译： 本发明涉及一种电气和电子外壳的下部，包括底部和紧固装置，用于通过卡口式紧固将盖子紧固到下部，紧固装置包括孔和肩状止动件，用于接收 主轴状元件的安装支架。 为了能够通过卡口卡扣装置或常规螺钉将盖子紧固到下部，下部的孔包括用于接收螺钉的螺纹。 本发明还涉及电气和电子外壳。

公开(公告)号：US20060070992A1

公开(公告)日：2006-04-06

申请号：US11233953

申请日：2005-09-23

申请人： Kenneth Weber

发明人： Kenneth Weber

IPC分类号： B65D6/28

CPC分类号： H02G3/086

摘要： The invention relates to a lower portion of an electric and electronic enclosure, comprising a bottom and fastening arrangements for fastening a cover to the lower portion with a bayonet-like fastening, the fastening arrangements comprising a bore and a shoulder-like stopper for receiving a mounting bracket of a spindle-like element. So as to be able to fasten the cover to the lower portion with either bayonet snap lock means or conventional screws, the bore of the lower portion comprises threads for receiving the screw. The invention also relates to an electric and electronic enclosure.