公开(公告)号：US10074533B1

公开(公告)日：2018-09-11

申请号：US15723390

申请日：2017-10-03

Applicant: Industrial Technology Research Institute

Inventor： Po-Chun Yeh ,  Kan-Hsueh Tsai ,  Chuan-Wei Tsou ,  Heng-Yuan Lee ,  Hsueh-Hsing Liu ,  Han-Chieh Ho ,  Yi-Keng Fu

IPC: H01L21/02 ,  H01L29/06 ,  H01L29/267 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L21/02035 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L29/0657 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/267

Abstract: This disclosure provides an epitaxial wafer, which includes: a silicon wafer having a central area and an extremity area enclosing the central area, the extremity area having a stepped profile; and an nitride epitaxial layer formed on the silicon wafer; wherein, the stepped profile has a width between 10 and 1500 μm and a height between 1 and 500 μm.