公开(公告)号：US20240312956A1

公开(公告)日：2024-09-19

申请号：US18122776

申请日：2023-03-17

Applicant: Infineon Technologies AG

Inventor： Pei Luan Pok ,  Swee Kah Lee ,  Soon Lock Goh ,  Chee Hong Lee ,  Samsun Paing ,  Chee Chiew Chong

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L24/96 ,  H01L21/4821 ,  H01L21/561 ,  H01L21/568 ,  H01L24/11 ,  H01L2224/11 ,  H01L2224/96

Abstract: A method of forming a semiconductor package includes providing a baseplate, mounting a semiconductor die on the baseplate with a main surface of the semiconductor die facing away from the baseplate, forming vertical interconnect elements on the main surface of the semiconductor die, forming an encapsulant on the baseplate that encapsulates the semiconductor die, exposing the vertical interconnect elements at an upper surface of the encapsulant, forming a first level metal pad on the upper surface of the encapsulant that contacts the exposed vertical interconnect elements, and forming structured metal regions on the upper surface of the encapsulant, wherein forming the structured metal regions includes structuring the first level metal pad.

公开(公告)号：US11239127B2

公开(公告)日：2022-02-01

申请号：US16906617

申请日：2020-06-19

Applicant: Infineon Technologies AG

Inventor： Edward Myers ,  Liu Chen ,  Chee Chiew Chong ,  Wee Aun Jason Lim ,  Wee Boon Tay

IPC: H01L23/48 ,  H01L23/31 ,  H01L23/36 ,  H01L23/00 ,  H01L21/56 ,  H01L23/498

Abstract: A molded semiconductor package arrangement may comprise a die pad configured to support a semiconductor; a set of leads; and a mold structure that is formed to enclose the semiconductor and the die pad within the mold structure. The set of leads and the die pad may be formed from a same piece of conductive material. An electrical contact plane of the set of leads may be offset from a bottom surface of the die pad. The mold structure may include a molded standoff that is beneath the die pad. A bottom surface of the molded standoff may extend below the electrical contact plane of the set of leads by a threshold distance that corresponds to a thickness of the molded standoff.

公开(公告)号：US20210313294A1

公开(公告)日：2021-10-07

申请号：US17210693

申请日：2021-03-24

Applicant: Infineon Technologies AG

Inventor： Chau Fatt Chiang ,  Xavier Arokiasamy ,  Naveendran Chellamuthu ,  Chee Chiew Chong ,  Joo Ming Goa ,  Chee Hong Lee ,  Muhammat Sanusi Muhammad ,  Chee Voon Tan ,  Wee Boon Tay

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/495

Abstract: A semiconductor package includes a carrier having a recess, a semiconductor die arranged on the carrier such that a first side of the semiconductor die faces the carrier, and a contact clip arranged over a second side of the semiconductor die, opposite the first side. The contact clip includes a lowered part. The lowered part is arranged in the recess.