公开(公告)号：US20180033752A1

公开(公告)日：2018-02-01

申请号：US15730174

申请日：2017-10-11

Applicant: Infineon Technologies AG

Inventor： Swee Kah Lee ,  Hock Heng Chong ,  Mei Chin Ng ,  Aileen Manantan Soriano ,  Fong Mei Lum ,  Muhammad Muhammat Sanusi ,  Soon Lock Goh

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L21/683 ,  H01L23/495 ,  H01L21/78

CPC classification number: H01L24/06 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/03 ,  H01L2224/0381 ,  H01L2224/03825 ,  H01L2224/05655 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.

公开(公告)号：US09540539B2

公开(公告)日：2017-01-10

申请号：US14287231

申请日：2014-05-27

Applicant: Infineon Technologies AG

Inventor： Swee Kah Lee ,  Joachim Mahler ,  Chew Theng Tai ,  Yik Yee Tan ,  Soon Lock Goh ,  Poh Cheng Lim ,  Jagen Krishnan ,  Peh Hean Teh

IPC: C09D179/04 ,  H01L23/29 ,  C09D5/08 ,  C09D163/00 ,  H01L21/56 ,  C08G14/06 ,  C09D161/34

CPC classification number: C09D179/04 ,  C08G14/06 ,  C09D5/002 ,  C09D5/08 ,  C09D161/34 ,  C09D163/00 ,  H01L21/565 ,  H01L23/296 ,  H01L23/3142 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  C08K5/544 ,  C08L63/00

Abstract: A primer composition is provided. The primer composition includes at least one bi- or multi-functional benzoxazine compound; and at least one compound including a functional group having affinity for a metallic surface, and a cross-linkable group. A method of forming a primer layer on a semiconductor device, and a method of encapsulating a semiconductor device are also provided.

Abstract translation: 提供底漆组合物。 底漆组合物包括至少一种双官能或多官能苯并恶嗪化合物; 和至少一种包含对金属表面具有亲和性的官能团的化合物和可交联基团。 还提供了在半导体器件上形成底漆层的方法以及封装半导体器件的方法。

公开(公告)号：US11081417B2

公开(公告)日：2021-08-03

申请号：US16514853

申请日：2019-07-17

Applicant: Infineon Technologies AG

Inventor： Sook Woon Chan ,  Chau Fatt Chiang ,  Kok Yau Chua ,  Soon Lock Goh ,  Swee Kah Lee ,  Joachim Mahler ,  Mei Chin Ng ,  Beng Keh See ,  Guan Choon Matthew Nelson Tee

IPC: H01L23/552 ,  H01L23/31 ,  C09D5/24 ,  C23C18/16 ,  C23C18/18 ,  H01L23/29 ,  C09D5/00 ,  C09D201/00 ,  C23C18/34 ,  H01L21/56 ,  H01L23/66 ,  H01L23/00

Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.

公开(公告)号：US09806043B2

公开(公告)日：2017-10-31

申请号：US15059827

申请日：2016-03-03

Applicant: Infineon Technologies AG

Inventor： Swee Kah Lee ,  Hock Heng Chong ,  Mei Chin Ng ,  Aileen Manantan Soriano ,  Fong Mei Lum ,  Muhammad Muhammat Sanusi ,  Soon Lock Goh

IPC: H01L23/00 ,  H01L21/78 ,  H01L21/683 ,  H01L23/31 ,  H01L23/495 ,  H01L23/29

CPC classification number: H01L24/06 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/03 ,  H01L2224/0381 ,  H01L2224/03825 ,  H01L2224/05655 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.

公开(公告)号：US10431560B2

公开(公告)日：2019-10-01

申请号：US15730174

申请日：2017-10-11

Applicant: Infineon Technologies AG

Inventor： Swee Kah Lee ,  Hock Heng Chong ,  Mei Chin Ng ,  Aileen Manantan Soriano ,  Fong Mei Lum ,  Muhammad Muhammat Sanusi ,  Soon Lock Goh

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/78 ,  H01L23/29 ,  H01L23/31 ,  H01L21/683

Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.

公开(公告)号：US09287238B2

公开(公告)日：2016-03-15

申请号：US14094207

申请日：2013-12-02

Applicant: Infineon Technologies AG

Inventor： Soon Lock Goh ,  Swee Kah Lee

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L24/97 ,  H01L21/4832 ,  H01L21/4842 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/09 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/02215 ,  H01L2224/03019 ,  H01L2224/03464 ,  H01L2224/09183 ,  H01L2224/095 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/83439 ,  H01L2224/83801 ,  H01L2224/84439 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01103 ,  H01L2924/0133 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/37 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/37099 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012

Abstract: A semiconductor package includes a plurality of bond pads having a first side and a second side opposing the first side, a coating covering the first side of the bond pads, semiconductor dies and electrical conductors attached to the second side of the bond pads, and a molding compound encasing the semiconductor dies and the electrical conductors at the second side of the bonds pads. The molding compound has a first side through which the bond pads protrude and a second side opposing the first side, the first side of the molding compound having a planar surface between adjacent ones of the bond pads. The package further includes a material plated on exposed sidewalls of the bonds pads uncovered by the molding compound and which is detectable by optical inspection. A corresponding method of manufacture is also provided.

Abstract translation: 半导体封装包括多个接合焊盘，其具有与第一侧相对的第一侧和第二侧，覆盖接合焊盘的第一侧的涂层，连接到接合焊盘的第二侧的半导体管芯和电导体，以及 封装半导体管芯的模制化合物和在键合焊盘的第二侧的电导体。 模塑料具有接合焊盘突出的第一侧和与第一侧相对的第二侧，模制化合物的第一侧在相邻的焊盘之间具有平坦表面。 该包装还包括镀在未被模制化合物覆盖的粘合垫的暴露的侧壁上的材料，并且其可通过光学检查来检测。 还提供了相应的制造方法。

公开(公告)号：US20150155229A1

公开(公告)日：2015-06-04

申请号：US14094207

申请日：2013-12-02

Applicant: Infineon Technologies AG

Inventor： Soon Lock Goh ,  Swee Kah Lee

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/495

CPC classification number: H01L24/97 ,  H01L21/4832 ,  H01L21/4842 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/09 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/02215 ,  H01L2224/03019 ,  H01L2224/03464 ,  H01L2224/09183 ,  H01L2224/095 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/83439 ,  H01L2224/83801 ,  H01L2224/84439 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01103 ,  H01L2924/0133 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/37 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/37099 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012

Abstract: A semiconductor package includes a plurality of bond pads having a first side and a second side opposing the first side, a coating covering the first side of the bond pads, semiconductor dies and electrical conductors attached to the second side of the bond pads, and a molding compound encasing the semiconductor dies and the electrical conductors at the second side of the bonds pads. The molding compound has a first side through which the bond pads protrude and a second side opposing the first side, the first side of the molding compound having a planar surface between adjacent ones of the bond pads. The package further includes a material plated on exposed sidewalls of the bonds pads uncovered by the molding compound and which is detectable by optical inspection. A corresponding method of manufacture is also provided.

Abstract translation: 半导体封装包括多个接合焊盘，其具有与第一侧相对的第一侧和第二侧，覆盖接合焊盘的第一侧的涂层，连接到接合焊盘的第二侧的半导体管芯和电导体，以及 封装半导体管芯的模制化合物和在键合焊盘的第二侧的电导体。 模塑料具有接合焊盘突出的第一侧和与第一侧相对的第二侧，模制化合物的第一侧在相邻的焊盘之间具有平坦表面。 该包装还包括镀在未被模制化合物覆盖的粘合垫的暴露的侧壁上的材料，并且其可通过光学检查来检测。 还提供了相应的制造方法。

公开(公告)号：US20200006267A1

公开(公告)日：2020-01-02

申请号：US16565817

申请日：2019-09-10

Applicant: Infineon Technologies AG

Inventor： Swee Kah Lee ,  Hock Heng Chong ,  Mei Chin Ng ,  Aileen Manantan Soriano ,  Fong Mei Lum ,  Muhammad Muhammat Sanusi ,  Soon Lock Goh

IPC: H01L23/00 ,  H01L21/683 ,  H01L21/78 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495

Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.

公开(公告)号：US20170256509A1

公开(公告)日：2017-09-07

申请号：US15059827

申请日：2016-03-03

Applicant: Infineon Technologies AG

Inventor： Swee Kah Lee ,  Hock Heng Chong ,  Mei Chin Ng ,  Aileen Manantan Soriano ,  Fong Mei Lum ,  Muhammad Muhammat Sanusi ,  Soon Lock Goh

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L21/78 ,  H01L21/683

CPC classification number: H01L24/06 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/03 ,  H01L2224/0381 ,  H01L2224/03825 ,  H01L2224/05655 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.

公开(公告)号：US20160064298A1

公开(公告)日：2016-03-03

申请号：US14835750

申请日：2015-08-26

Applicant: Infineon Technologies AG

Inventor： Peh Hean TEH ,  Jagen Krishnan ,  Swee Kah Lee ,  Poh Cheng Lim ,  Joachim Mahler ,  Chew Theng Tai ,  Yik Yee Tan ,  Soon Lock Goh

IPC: H01L23/29 ,  H01L21/3105 ,  H01L23/00 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31

CPC classification number: H01L21/3105 ,  C09J163/00 ,  H01L21/56 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/49513 ,  H01L23/49548 ,  H01L23/49555 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/8392 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and a plurality of capsules in the encapsulant, wherein the capsules comprise a core comprising an additive and comprise a shell, in particular a crackable shell, enclosing the core.

Abstract translation: 一种电子设备，包括具有安装表面的载体，安装在所述安装表面上的至少一个电子芯片，至少部分地封装所述载体和所述至少一个电子芯片的密封剂以及所述密封剂中的多个胶囊，其中所述胶囊 包括包含添加剂的芯，并且包括封装芯的壳，特别是可裂纹壳。