公开(公告)号：US10340334B2

公开(公告)日：2019-07-02

申请号：US15986942

申请日：2018-05-23

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/06 ,  H01L21/265 ,  H01L21/768 ,  H01L23/528 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L29/40 ,  H03F1/02 ,  H03F3/193 ,  H01L23/48

Abstract: In an embodiment, a semiconductor device includes a semiconductor substrate having a bulk resistivity ρ≥100 Ohm.cm, a front surface and a rear surface. An LDMOS transistor is arranged in the semiconductor substrate. A RESURF structure including a doped buried layer is arranged in the semiconductor substrate. The LDMOS transistor includes a body contact region doped with a first conductivity type, and a source region disposed in the body contact region and doped with a second conductivity type opposite the first conductivity type. The source region includes a first well and a second well of the same second conductivity type. The first well is more highly doped than the second well. The first well extends from inside the body contact region to outside of a lateral extent of the body contact region in a direction towards a source side of a gate of the LDMOS transistor.

公开(公告)号：US20170373138A1

公开(公告)日：2017-12-28

申请号：US15458492

申请日：2017-03-14

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/06 ,  H01L29/40 ,  H01L21/768 ,  H01L29/78 ,  H03F1/02 ,  H03F3/193

CPC classification number: H01L29/063 ,  H01L21/26513 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7823 ,  H03F1/0288 ,  H03F3/193 ,  H03F2200/451

Abstract: In an embodiment, a high frequency amplifying circuit includes a semiconductor device. The semiconductor device includes a semiconductor substrate having a bulk resistivity ρ≧100 Ohm·cm, a front surface and a rear surface, an LDMOS (Lateral Diffused Metal Oxide Semiconductor) transistor in the semiconductor substrate, and a RESURF structure comprising a doped buried layer arranged in the semiconductor substrate, spaced at a distance from the front surface and the rear surface, and coupled with at least one of a channel region and a body contact region of the LDMOS transistor.

公开(公告)号：US09634085B1

公开(公告)日：2017-04-25

申请号：US15191854

申请日：2016-06-24

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/10 ,  H01L21/265 ,  H01L21/768 ,  H01L23/528

Abstract: In an embodiment, a semiconductor device includes a semiconductor substrate having a bulk resistivity ρ≧100 Ohm·cm, a front surface and a rear surface, at least one LDMOS transistor in the semiconductor substrate, and a RESURF structure. The RESURF structure includes a doped buried layer arranged in the semiconductor substrate, spaced at a distance from the front surface and the rear surface, and coupled with at least one of a channel region and a body contact region of the LDMOS transistor.

公开(公告)号：US20180269279A1

公开(公告)日：2018-09-20

申请号：US15986942

申请日：2018-05-23

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H03F3/193 ,  H01L21/768 ,  H03F1/02

CPC classification number: H01L29/063 ,  H01L21/26513 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/4175 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7823 ,  H01L29/7835 ,  H03F1/0288 ,  H03F3/193 ,  H03F2200/451

Abstract: In an embodiment, a semiconductor device includes a semiconductor substrate having a bulk resistivity ρ≥100 Ohm.cm, a front surface and a rear surface. An LDMOS transistor is arranged in the semiconductor substrate. A RESURF structure including a doped buried layer is arranged in the semiconductor substrate. The LDMOS transistor includes a body contact region doped with a first conductivity type, and a source region disposed in the body contact region and doped with a second conductivity type opposite the first conductivity type. The source region includes a first well and a second well of the same second conductivity type. The first well is more highly doped than the second well. The first well extends from inside the body contact region to outside of a lateral extent of the body contact region in a direction towards a source side of a gate of the LDMOS transistor.

公开(公告)号：US20170373137A1

公开(公告)日：2017-12-28

申请号：US15191854

申请日：2016-06-24

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/10 ,  H01L23/528 ,  H01L21/768 ,  H01L29/78 ,  H01L21/265

CPC classification number: H01L29/063 ,  H01L21/26513 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7823 ,  H03F1/0288 ,  H03F3/193 ,  H03F2200/451

Abstract: In an embodiment, a semiconductor device includes a semiconductor substrate having a bulk resistivity ρ≧100 Ohm.cm, a front surface and a rear surface, at least one LDMOS transistor in the semiconductor substrate, and a RESURF structure. The RESURF structure includes a doped buried layer arranged in the semiconductor substrate, spaced at a distance from the front surface and the rear surface, and coupled with at least one of a channel region and a body contact region of the LDMOS transistor.

公开(公告)号：US10026806B2

公开(公告)日：2018-07-17

申请号：US15458492

申请日：2017-03-14

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/768 ,  H03F3/193 ,  H03F1/02 ,  H01L29/78 ,  H01L29/40

Abstract: In an embodiment, a high frequency amplifying circuit includes a semiconductor device. The semiconductor device includes a semiconductor substrate having a bulk resistivity ρ≥100 Ohm·cm, a front surface and a rear surface, an LDMOS (Lateral Diffused Metal Oxide Semiconductor) transistor in the semiconductor substrate, and a RESURF structure comprising a doped buried layer arranged in the semiconductor substrate, spaced at a distance from the front surface and the rear surface, and coupled with at least one of a channel region and a body contact region of the LDMOS transistor.

公开(公告)号：US09960229B2

公开(公告)日：2018-05-01

申请号：US15191854

申请日：2016-06-24

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/10 ,  H01L21/265 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L29/063 ,  H01L21/26513 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5283 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7823 ,  H03F1/0288 ,  H03F3/193 ,  H03F2200/451

Abstract: In an embodiment, a semiconductor device includes a semiconductor substrate having a bulk resistivity ρ≥100 Ohm.cm, a front surface and a rear surface, at least one LDMOS transistor in the semiconductor substrate, and a RESURF structure. The RESURF structure includes a doped buried layer arranged in the semiconductor substrate, spaced at a distance from the front surface and the rear surface, and coupled with at least one of a channel region and a body contact region of the LDMOS transistor.

公开(公告)号：US20170373187A1

公开(公告)日：2017-12-28

申请号：US15191937

申请日：2016-06-24

Applicant: Infineon Technologies AG

Inventor： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum ,  Michaela Braun ,  Christian Eckl

IPC: H01L29/78 ,  H01L29/10 ,  H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L29/66 ,  H01L23/532

CPC classification number: H01L29/7816 ,  H01L21/76804 ,  H01L21/76877 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53295 ,  H01L29/1095 ,  H01L29/66681

Abstract: In an embodiment, a semiconductor device includes a semiconductor substrate having a front surface, a LDMOS transistor in the front surface, and a metallization structure arranged on the front surface. The metallization structure includes at least one cavity arranged in at least one dielectric layer.