公开(公告)号：US20250006601A1

公开(公告)日：2025-01-02

申请号：US18342394

申请日：2023-06-27

Applicant: Infineon Technologies AG

Inventor： Achim Althaus ,  Andreas Groove ,  Christoph Liebl

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L25/07

Abstract: A power semiconductor module includes an AC bus bar having a first side that faces a first substrate and a second side that faces a second substrate. A first power transistor die has a drain terminal connected to a first metallic region of the first substrate and a source terminal connected to the first side of the AC bus bar. A second power transistor die has a drain terminal connected to the second side of the AC bus bar and a source terminal connected to a first metallic region of the second substrate. First and second DC bus bars are connected to the first metallic region of the respective substrates, vertically overlap one another, and protrude from a first side of a mold body that encapsulates the power transistor dies. The AC bus bar protrudes from a different side of the mold body as the DC bus bars.

公开(公告)号：US10978378B2

公开(公告)日：2021-04-13

申请号：US16219415

申请日：2018-12-13

Applicant: Infineon Technologies AG

Inventor： Thomas Bemmerl ,  Kuok Wai Chan ,  Christoph Liebl ,  Bun Kian Tay ,  Wee Boon Tay ,  Wae Chet Yong

IPC: H01L23/48 ,  H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: A leadless package includes an at least partially electrically conductive carrier having a mounting section and a lead section, an electronic chip mounted on the mounting section, and an encapsulant at least partially encapsulating the electronic chip and partially encapsulating the carrier so that at least part of an interior sidewall of the lead section not forming part of an exterior sidewall of the package is exposed.

公开(公告)号：US20220415732A1

公开(公告)日：2022-12-29

申请号：US17840971

申请日：2022-06-15

Applicant: Infineon Technologies AG

Inventor： Christoph Liebl ,  Stefan Schwab ,  Adrian Lis ,  Michael Ledutke ,  Lisa Aschenbrenner

IPC: H01L23/057 ,  H01L23/31 ,  H01L23/373

Abstract: A semiconductor module includes: a chip carrier having a first side and a second, opposite side; a semiconductor chip arranged on the first side of the chip carrier; an encapsulation body that encapsulates the semiconductor chip; and at least two external contacts made of a metal or an alloy and arranged next to each other, which are electrically and mechanically connected to the first side of the first chip carrier and protrude laterally out of the encapsulation body. At least one of the external contacts has at least one wing arranged within the encapsulation body and located opposite the other external contact. The wing includes one or more cutouts that are filled with the encapsulation material of the encapsulation body.

公开(公告)号：US20190189542A1

公开(公告)日：2019-06-20

申请号：US16219415

申请日：2018-12-13

Applicant: Infineon Technologies AG

Inventor： Thomas Bemmerl ,  Kuok Wai Chan ,  Christoph Liebl ,  Bun Kian Tay ,  Wee Boon Tay ,  Wae Chet Yong

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/49503 ,  H01L21/4828 ,  H01L21/56 ,  H01L23/3157 ,  H01L23/49548 ,  H01L24/49

Abstract: A leadless package includes an at least partially electrically conductive carrier having a mounting section and a lead section, an electronic chip mounted on the mounting section, and an encapsulant at least partially encapsulating the electronic chip and partially encapsulating the carrier so that at least part of an interior sidewall of the lead section not forming part of an exterior sidewall of the package is exposed.