公开(公告)号：US20210391298A1

公开(公告)日：2021-12-16

申请号：US17412787

申请日：2021-08-26

Applicant: Infineon Technologies AG

Inventor： Khay Chwan Saw ,  Chau Fatt Chiang ,  Stefan Macheiner ,  Wae Chet Yong

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/495 ,  H01L23/29 ,  H01L25/065 ,  H01L23/52

Abstract: A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

公开(公告)号：US12094807B2

公开(公告)日：2024-09-17

申请号：US17485742

申请日：2021-09-27

Applicant: Infineon Technologies AG

Inventor： Sergey Yuferev ,  Paul Armand Asentista Calo ,  Theng Chao Long ,  Josef Maerz ,  Chee Yang Ng ,  Petteri Palm ,  Wae Chet Yong

IPC: H01L23/495 ,  H01L23/31 ,  H01L25/00

CPC classification number: H01L23/49575 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L25/50

Abstract: A package and method of manufacturing a package is disclosed. In one example, a package which comprises a first transistor chip having a first source pad and a second transistor chip having a second source pad and being stacked with the first transistor chip at an interface area. The first source pad and the second source pad are coupled at the interface area.

公开(公告)号：US10978378B2

公开(公告)日：2021-04-13

申请号：US16219415

申请日：2018-12-13

Applicant: Infineon Technologies AG

Inventor： Thomas Bemmerl ,  Kuok Wai Chan ,  Christoph Liebl ,  Bun Kian Tay ,  Wee Boon Tay ,  Wae Chet Yong

IPC: H01L23/48 ,  H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: A leadless package includes an at least partially electrically conductive carrier having a mounting section and a lead section, an electronic chip mounted on the mounting section, and an encapsulant at least partially encapsulating the electronic chip and partially encapsulating the carrier so that at least part of an interior sidewall of the lead section not forming part of an exterior sidewall of the package is exposed.

公开(公告)号：US11133281B2

公开(公告)日：2021-09-28

申请号：US16375479

申请日：2019-04-04

Applicant: Infineon Technologies AG

Inventor： Khay Chwan Saw ,  Chau Fatt Chiang ,  Stefan Macheiner ,  Wae Chet Yong

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/495 ,  H01L23/29 ,  H01L25/065 ,  H01L23/52 ,  H01L21/60

Abstract: A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

公开(公告)号：US20200321276A1

公开(公告)日：2020-10-08

申请号：US16375479

申请日：2019-04-04

Applicant: Infineon Technologies AG

Inventor： Khay Chwan Saw ,  Chau Fatt Chiang ,  Stefan Macheiner ,  Wae Chet Yong

IPC: H01L23/52 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

Abstract: A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

公开(公告)号：US11569196B2

公开(公告)日：2023-01-31

申请号：US17412787

申请日：2021-08-26

Applicant: Infineon Technologies AG

Inventor： Khay Chwan Saw ,  Chau Fatt Chiang ,  Stefan Macheiner ,  Wae Chet Yong

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L25/065 ,  H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L21/60

Abstract: A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

公开(公告)号：US20190189542A1

公开(公告)日：2019-06-20

申请号：US16219415

申请日：2018-12-13

Applicant: Infineon Technologies AG

Inventor： Thomas Bemmerl ,  Kuok Wai Chan ,  Christoph Liebl ,  Bun Kian Tay ,  Wee Boon Tay ,  Wae Chet Yong

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/49503 ,  H01L21/4828 ,  H01L21/56 ,  H01L23/3157 ,  H01L23/49548 ,  H01L24/49

Abstract: A leadless package includes an at least partially electrically conductive carrier having a mounting section and a lead section, an electronic chip mounted on the mounting section, and an encapsulant at least partially encapsulating the electronic chip and partially encapsulating the carrier so that at least part of an interior sidewall of the lead section not forming part of an exterior sidewall of the package is exposed.