公开(公告)号：US20180286944A1

公开(公告)日：2018-10-04

申请号：US15941637

申请日：2018-03-30

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Karl-Heinz Bach ,  Christian Kampen ,  Dietmar Kotz ,  Andrew Christopher Graeme Wood ,  Markus Zundel

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/10 ,  H01L21/266 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/0619 ,  H01L21/26586 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/7813

Abstract: A semiconductor device includes a semiconductor body having a semiconductor substrate of a first conductivity type and a semiconductor layer of the first conductivity type on the substrate. A trench structure extends into the semiconductor body from a first surface and includes a gate electrode and at least one field electrode arranged between the gate electrode and a bottom side of the trench structure. A body region adjoins the trench structure and laterally extends from a transistor cell area into an edge termination area. A pn junction is between the body region and semiconductor layer. A doping concentration of at least one of the body region and semiconductor layer is lowered at a lateral end of the pn junction in the edge termination area compared to a doping concentration of the at least one of the body region and semiconductor layer at the pn junction in the transistor cell area.

公开(公告)号：US09941402B2

公开(公告)日：2018-04-10

申请号：US15627481

申请日：2017-06-20

Applicant: Infineon Technologies AG

Inventor： Adrian Finney ,  Dietmar Kotz ,  Radu Eugen Cazimirovici ,  Thomas Ostermann

IPC: H01L21/82 ,  H01L27/08 ,  H01L29/78 ,  H01L29/36 ,  H01L29/10 ,  H01L29/66 ,  H01L21/263 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06

CPC classification number: H01L29/7811 ,  H01L21/263 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66712

Abstract: A semiconductor device includes a guard structure located laterally between first and second active areas of a semiconductor substrate. The guard structure includes a first doping region at a front side surface of the substrate and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the substrate to at least a part of the front side surface in contact with the wiring structure. An edge termination doping region laterally surrounds the first and second active areas. The edge termination doping region and the first doping region have a first conductivity type, and the common doping region has a second conductivity type. A resistive connection between the edge termination doping region and the first doping region is present at least during reverse operating conditions of the semiconductor device.

公开(公告)号：US10453915B2

公开(公告)日：2019-10-22

申请号：US15941637

申请日：2018-03-30

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Karl-Heinz Bach ,  Christian Kampen ,  Dietmar Kotz ,  Andrew Christopher Graeme Wood ,  Markus Zundel

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/10 ,  H01L29/78 ,  H01L29/66 ,  H01L21/266 ,  H01L29/36 ,  H01L21/265

Abstract: A semiconductor device includes a semiconductor body having a semiconductor substrate of a first conductivity type and a semiconductor layer of the first conductivity type on the substrate. A trench structure extends into the semiconductor body from a first surface and includes a gate electrode and at least one field electrode arranged between the gate electrode and a bottom side of the trench structure. A body region adjoins the trench structure and laterally extends from a transistor cell area into an edge termination area. A pn junction is between the body region and semiconductor layer. A doping concentration of at least one of the body region and semiconductor layer is lowered at a lateral end of the pn junction in the edge termination area compared to a doping concentration of the at least one of the body region and semiconductor layer at the pn junction in the transistor cell area.

公开(公告)号：US10199490B2

公开(公告)日：2019-02-05

申请号：US15915890

申请日：2018-03-08

Applicant: Infineon Technologies AG

Inventor： Adrian Finney ,  Radu Eugen Cazimirovici ,  Dietmar Kotz ,  Thomas Ostermann

IPC: H01L29/78 ,  H01L27/08 ,  H01L21/82 ,  H01L21/263 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L29/36 ,  H01L29/66

Abstract: A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.

公开(公告)号：US20170373182A1

公开(公告)日：2017-12-28

申请号：US15627481

申请日：2017-06-20

Applicant: Infineon Technologies AG

Inventor： Adrian Finney ,  Dietmar Kotz ,  Radu Eugen Cazimirovici ,  Thomas Ostermann

IPC: H01L29/78 ,  H01L29/36 ,  H01L29/06 ,  H01L21/263 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/7811 ,  H01L21/263 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66712

Abstract: A semiconductor device includes a guard structure located laterally between first and second active areas of a semiconductor substrate. The guard structure includes a first doping region at a front side surface of the substrate and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the substrate to at least a part of the front side surface in contact with the wiring structure. An edge termination doping region laterally surrounds the first and second active areas. The edge termination doping region and the first doping region have a first conductivity type, and the common doping region has a second conductivity type. A resistive connection between the edge termination doping region and the first doping region is present at least during reverse operating conditions of the semiconductor device.

公开(公告)号：US20180197982A1

公开(公告)日：2018-07-12

申请号：US15915890

申请日：2018-03-08

Applicant: Infineon Technologies AG

Inventor： Adrian Finney ,  Radu Eugen Cazimirovici ,  Dietmar Kotz ,  Thomas Ostermann

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/36 ,  H01L29/10 ,  H01L21/263 ,  H01L27/088 ,  H01L21/8234

CPC classification number: H01L29/7811 ,  H01L21/263 ,  H01L21/761 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/861 ,  H01L29/8611

Abstract: A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.