Vertical Semiconductor Device having Semiconductor Mesas with Side Walls and a PN-Junction Extending between the Side Walls
    2.
    发明申请
    Vertical Semiconductor Device having Semiconductor Mesas with Side Walls and a PN-Junction Extending between the Side Walls 有权
    具有具有侧壁的半导体介面和在侧壁之间延伸的PN结的垂直半导体器件

    公开(公告)号:US20160035845A1

    公开(公告)日:2016-02-04

    申请号:US14879851

    申请日:2015-10-09

    Abstract: A vertical semiconductor device includes a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially perpendicular to the backside, from the backside to a first surface of the semiconductor body, the body including in an active area spaced apart semiconductor mesas extending, in the vertical direction, from the first surface to a main surface arranged above the first surface, in a vertical cross-section the peripheral area extending between the active area and an edge that extends between the back-side and the first surface, in the vertical cross-section each of the mesas including first and second side walls, a first pn-junction extending between the first and second side walls, and a conductive region in Ohmic contact with the mesa and extending from the main surface into the mesa. Gate electrodes are arranged between adjacent mesas and extend across the first pn-junctions.

    Abstract translation: 垂直半导体器件包括半导体本体,该半导体本体具有背面,并且在半导体本体的背面至第一表面的周边区域和与背面大致垂直的垂直方向上延伸,该主体包括在间隔开的有源区域中 半导体台面在垂直方向上从第一表面延伸到布置在第一表面上方的主表面,在垂直横截面中,在有效区域和在后侧和第一表面之间延伸的边缘之间延伸的外围区域 在垂直横截面中,每个台面包括第一和第二侧壁,在第一和第二侧壁之间延伸的第一pn结,以及与台面欧姆接触并从主表面延伸的导电区域 台面 栅电极被布置在相邻的台面之间并延伸穿过第一pn结。

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