公开(公告)号：US10606106B2

公开(公告)日：2020-03-31

申请号：US15707453

申请日：2017-09-18

Applicant: InnoLux Corporation

Inventor： Yu-Hsiang Chiu ,  Chien-Feng Shih ,  Huan-Kuang Peng

IPC: G02F1/133 ,  G02F1/1333 ,  G02F1/1345

Abstract: A display panel includes a first substrate, a second substrate, a display layer, and a driving unit. The first substrate has a display area, an extended area, and an edge area located between the display area and the extended area. The display layer is positioned between the first and second substrates. The length of a boundary line of the edge area and the extended area is greater than the length of a bottom edge of the extended area that is away from the edge area.

公开(公告)号：US20240297638A1

公开(公告)日：2024-09-05

申请号：US18663116

申请日：2024-05-14

Applicant: Innolux Corporation

Inventor： Yi-Hung Lin ,  Chung-Le Chen ,  Shuo-Ting Hong ,  Yu-Ti Huang ,  Yu-Hsiang Chiu ,  Nai-Fang Hsu

IPC: H03K3/01 ,  H03K17/687

CPC classification number: H03K3/01 ,  H03K17/687

Abstract: Disclosed is an electronic device including a tunable element, a first power supply circuit, and a second power supply circuit. The first power supply circuit and the second power supply circuit are electrically connected to the tunable element. The first power supply circuit drives the tunable element during a first time period. The second power supply circuit drives the tunable element during a second time period.

公开(公告)号：US20230261650A1

公开(公告)日：2023-08-17

申请号：US18161899

申请日：2023-01-31

Applicant: Innolux Corporation

Inventor： Hsiu-Yi Tsai ,  Yu-Ti Huang ,  Yu-Hsiang Chiu ,  Yi-Hung Lin

IPC: H03K17/56

CPC classification number: H03K17/56

Abstract: The disclosure provides an electrical apparatus, including a substrate, a plurality of gate driver units and a plurality of gate lines. The gate driver units are disposed on the substrate. The gate lines are disposed on the substrate. Each of the gate lines is respectively electrically connected to the corresponding gate driver unit. Each of the gate lines is configured to transmit a respective gate signal. The gate lines include a first gate line and a second gate line. The first gate line and the second gate line are configured to transmit the respective gate signals at a same time.

公开(公告)号：US12255638B2

公开(公告)日：2025-03-18

申请号：US18161899

申请日：2023-01-31

Applicant: Innolux Corporation

Inventor： Hsiu-Yi Tsai ,  Yu-Ti Huang ,  Yu-Hsiang Chiu ,  Yi-Hung Lin

IPC: H03K17/56

Abstract: The disclosure provides an electrical apparatus, including a substrate, a plurality of gate driver units and a plurality of gate lines. The gate driver units are disposed on the substrate. The gate lines are disposed on the substrate. Each of the gate lines is respectively electrically connected to the corresponding gate driver unit. Each of the gate lines is configured to transmit a respective gate signal. The gate lines include a first gate line and a second gate line. The first gate line and the second gate line are configured to transmit the respective gate signals at a same time.

公开(公告)号：US11990906B2

公开(公告)日：2024-05-21

申请号：US17945092

申请日：2022-09-15

Applicant: Innolux Corporation

Inventor： Yi-Hung Lin ,  Chung-Le Chen ,  Shuo-Ting Hong ,  Yu-Ti Huang ,  Yu-Hsiang Chiu ,  Nai-Fang Hsu

IPC: H03K3/01 ,  H03K17/687

CPC classification number: H03K3/01 ,  H03K17/687

Abstract: Disclosed is an electronic device including a tunable element, a first power supply circuit, and a second power supply circuit. The first power supply circuit and the second power supply circuit are electrically connected to the tunable element. The first power supply circuit drives the tunable element during a first time period. The second power supply circuit drives the tunable element during a second time period.

公开(公告)号：US09798170B2

公开(公告)日：2017-10-24

申请号：US14932253

申请日：2015-11-04

Applicant: InnoLux Corporation

Inventor： Yu-Hsiang Chiu ,  Chien-Feng Shih ,  Huan-Kuang Peng

IPC: G02F1/133 ,  G02F1/1333 ,  G02F1/1345

CPC classification number: G02F1/13306 ,  G02F1/1333 ,  G02F1/13452 ,  G02F2001/133388 ,  G02F2001/13456 ,  G02F2201/56

Abstract: A display panel includes a first substrate, a second substrate, a display layer, and a driving unit. The first substrate has a display area, an extended area, and an edge area located between the display area and the extended area. The display layer is positioned between the first and second substrates. The length of a boundary line of the edge area and the extended area is greater than the length of a bottom edge of the extended area that away from the edge area.

公开(公告)号：US09620077B2

公开(公告)日：2017-04-11

申请号：US14676167

申请日：2015-04-01

Applicant: InnoLux Corporation

Inventor： Chien-Feng Shih ,  Yu-Hsiang Chiu ,  Liang-Yun Chang ,  Sheng-Feng Huang

IPC: H01L27/12 ,  G09B5/00 ,  G09G5/00 ,  H01L29/423 ,  H01L29/417 ,  G09G3/20 ,  H01L27/02

CPC classification number: G09G5/00 ,  G09G3/20 ,  G09G2300/04 ,  G09G2300/0413 ,  G09G2300/0426 ,  H01L27/0292 ,  H01L27/124 ,  H01L29/417 ,  H01L29/41733 ,  H01L29/423 ,  H01L29/42324 ,  H01L29/42384

Abstract: A display panel structure includes a substrate, plural gate lines and data lines arranged on the substrate, plural pixel units, and plural dummy pixel units. The substrate has a display region and a peripheral region surrounding the display region. The gate lines and data lines are extended from the display region to the peripheral region. The pixel units are disposed at the display region. The dummy pixel units are disposed at the peripheral region, and include a first region, a second region, and a third region. The dummy pixel units of the first region and the second region are arranged along a first direction and a second direction, respectively. The dummy pixel units of the third region are arranged between the first and second regions. The dummy pixel units of the third region include one of the gate lines and one of the data lines.