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公开(公告)号:US20170365672A1
公开(公告)日:2017-12-21
申请号:US15539597
申请日:2015-07-16
发明人: Shengkai WANG , Honggang LIU , Bing SUN , Hudong CHANG
CPC分类号: H01L29/408 , H01L21/02178 , H01L21/02192 , H01L21/0228 , H01L21/02301 , H01L21/02356 , H01L21/28264 , H01L21/285 , H01L29/20 , H01L29/42364 , H01L29/513 , H01L29/517
摘要: The present invention discloses a composite gate dielectric layer for a Group III-V substrate and a method for manufacturing the same. The composite gate dielectric layer comprises: an AlxY2-xO3 interface passivation layer formed onthe group III-V substrate; and a high dielectric insulating layer formed on the AlxY2-xO3 interface passivation layer, wherein 1.2≦x≦1.9.The composite gate dielectric layer modifies the AI/Y ratio of the AlxY2-xO3 interface passivation layer, changes the average number of atomic coordination in the AlxY2-xO3 interface passivation layer, and decreases the interface state density and boundary trap density of the Group III-V substrate, increases the mobility of the MOS channel. By cooperation of the AlxY2-xO3 interface passivation layer and high dielectric insulation layer, it reduces leakage current and improvestolerance of the dielectric layer on the voltage, and improvesthe quality of the MOS capacitor of the Group III-V substrate and enhances its reliability.