公开(公告)号：US20240078702A1

公开(公告)日：2024-03-07

申请号：US17902907

申请日：2022-09-05

Applicant: Intel Corporation

Inventor： Yi LI ,  Hong Seung YEON ,  Nicholas HAEHN ,  Wei LI ,  Raquel DE SOUZA BORGES FERREIRA ,  Minglu LIU ,  Robin McREE ,  Yosuke KANAOKA ,  Gang DUAN ,  Arnab ROY

IPC: G06T7/73 ,  H01L21/68 ,  H01L23/544

CPC classification number: G06T7/74 ,  H01L21/681 ,  H01L23/544 ,  G06T2207/20081 ,  G06T2207/30204 ,  H01L2223/54426

Abstract: A method for recognizing a reference point associated with a fiducial marker including the steps of: obtaining or receiving image data of the fiducial marker; determining the degree of which the image data of the fiducial marker is aligned with one or more reference images; of which if the degree of alignment is determined to be less than an acceptable threshold predicting a set of coordinates of the reference point associated with the fiducial marker; incorporating the set of coordinates with the image data to form a modified image data; and determining the degree of which the modified image data of the fiducial marker is aligned with one or more reference images.

公开(公告)号：US20220285278A1

公开(公告)日：2022-09-08

申请号：US17752717

申请日：2022-05-24

Applicant: Intel Corporation

Inventor： Jeremy D. ECTON ,  Hiroki TANAKA ,  Oscar OJEDA ,  Arnab ROY ,  Vahidreza PARICHEHREH ,  Leonel R. ARANA ,  Chung Kwang TAN ,  Robert A. MAY

IPC: H01L23/538 ,  H01L21/48

Abstract: Embodiments include a package structure with one or more layers of dielectric material, where an interconnect bridge substrate is embedded within the dielectric material. One or more via structures are on a first surface of the embedded substrate, where individual ones of the via structures comprise a conductive material and have a tapered profile. The conductive material is also on a sidewall of the embedded substrate.