公开(公告)号：US20160148920A1

公开(公告)日：2016-05-26

申请号：US15009731

申请日：2016-01-28

Applicant: Intel Corporation

Inventor： Reinhard Mahnkopf ,  Wolfgang Molzer ,  Bernd Memmler ,  Edmund Goetz ,  Hans-Joachim Barth ,  Sven Albers ,  Thorsten Meyer

IPC: H01L25/00 ,  H01L21/768 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/5389 ,  H01L21/56 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/3121 ,  H01L23/5226 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/03 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/50 ,  H01L2224/08146 ,  H01L2224/16148 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.

公开(公告)号：US09564400B2

公开(公告)日：2017-02-07

申请号：US15009731

申请日：2016-01-28

Applicant: Intel Corporation

Inventor： Reinhard Mahnkopf ,  Wolfgang Molzer ,  Bernd Memmler ,  Edmund Goetz ,  Hans-Joachim Barth ,  Sven Albers ,  Thorsten Meyer

IPC: H01L21/44 ,  H01L23/538 ,  H01L21/768 ,  H01L23/522 ,  H01L23/00 ,  H01L25/07 ,  H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/5389 ,  H01L21/56 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/3121 ,  H01L23/5226 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/03 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/50 ,  H01L2224/08146 ,  H01L2224/16148 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.

Abstract translation: 本说明书的实施例包括嵌入在微电子衬底中的堆叠微电子骰子及其制造方法。 在一个实施例中，至少一个第一微电子管芯连接到第二微电子管芯，其中在第二微电子管芯和至少一个第一微电子管芯之间提供底部填充材料。 然后通过将第一微电子管芯和第二微电子管芯层压在衬底材料中来形成微电子衬底。

公开(公告)号：US09373588B2

公开(公告)日：2016-06-21

申请号：US14034854

申请日：2013-09-24

Applicant: Intel Corporation

Inventor： Reinhard Mahnkopf ,  Wolfgang Molzer ,  Bernd Memmler ,  Edmund Goetz ,  Hans-Joachim Barth ,  Sven Albers ,  Thorsten Meyer

IPC: H01L29/40 ,  H01L23/538 ,  H01L21/768 ,  H01L23/522 ,  H01L23/00 ,  H01L25/07 ,  H01L25/00 ,  H01L25/065 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/5389 ,  H01L21/56 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/3121 ,  H01L23/5226 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/03 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/50 ,  H01L2224/08146 ,  H01L2224/16148 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.

Abstract translation: 本说明书的实施例包括嵌入在微电子衬底中的堆叠微电子骰子及其制造方法。 在一个实施例中，至少一个第一微电子管芯连接到第二微电子管芯，其中在第二微电子管芯和至少一个第一微电子管芯之间提供底部填充材料。 然后通过将第一微电子管芯和第二微电子管芯层压在衬底材料中来形成微电子衬底。