公开(公告)号：US20240204064A1

公开(公告)日：2024-06-20

申请号：US18084844

申请日：2022-12-20

Applicant: Intel Corporation

Inventor： Guillaume Bouche ,  Bilal Chehab ,  Lars Liebmann ,  Quan Shi

IPC: H01L29/417 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L29/41733 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775

Abstract: Techniques are provided herein to form semiconductor devices having a dielectric wall or spine between two devices that extends between source or drain regions of the two devices and separates backside contacts to the source or drain regions. A first semiconductor device includes a first semiconductor region extending from a first source or drain region and a second adjacent semiconductor device includes a second semiconductor region extending from a second source or drain region adjacent to the first source or drain region. A dielectric wall extends between the first source or drain region and the second source or drain region. A first backside contact touches the underside of the first source or drain region and a second backside contact touches the underside of the second source or drain region. The dielectric wall further extends down between the first conductive contact and the second conductive contact.

公开(公告)号：US20240429235A1

公开(公告)日：2024-12-26

申请号：US18337697

申请日：2023-06-20

Applicant: Intel Corporation

Inventor： Bilal Chehab ,  Changyok Park ,  Tuhin Guha Neogi ,  George Joseph Sacks ,  Christophe Berteau-Pavy

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/778 ,  H01L29/786

Abstract: A CFET may include two or more transistors stacked over each other. A transistor may be a FET including a forked semiconductor structure. The source region and drain region of a transistor may have a forked shape including a body and one or more branches protruding from the body. A branch may include a fin, nanoribbon, etc. The channel region may be between a branch of the source region and a branch of the drain region. The body of the source region and the body of the drain region may be on opposite sides of the channel region in two perpendicular directions. The two bodies may be diagonally arranged with respect to the channel region. The body of the source region or drain region may be over a contact that is electrically coupled to a frontside metal layer or a backside metal layer for signal transmission or power delivery.