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公开(公告)号:US20190278503A1
公开(公告)日:2019-09-12
申请号:US16425883
申请日:2019-05-29
Applicant: Intel Corporation
Inventor: Sowmiya JAYACHANDRAN , Andrew MORNING-SMITH , Brian R. MCFARLANE , William T. GLENNAN , Emily P. CHUNG
Abstract: A method is described. The method includes performing write operations on a plurality of NVRAM semiconductor chips of a memory module while tracking power budget headroom for performing the write operations and while monitoring current draw on a supply voltage rail that is coupled to the plurality of NVRAM semiconductor chips. The method further includes detecting the current draw has reached a threshold. The method further includes ceasing or diminishing the write operations in response to the detecting.
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公开(公告)号:US20170213034A1
公开(公告)日:2017-07-27
申请号:US15419368
申请日:2017-01-30
Applicant: Intel Corporation
Inventor: Nitin V. SARANGDHAR , Robert J. ROYER, JR. , Eng Hun OOI , Brian R. MCFARLANE , Mukesh KATARIA
CPC classification number: G06F21/572 , G06F9/4403 , G06F9/4406 , G06F9/4411 , G06F11/1417 , G06F21/57 , G06F21/575 , G06F2212/1052 , G06F2221/03 , G06F2221/033
Abstract: A hardware platform includes a nonvolatile storage device that can store system firmware as well as code for the primary operating system for the hardware platform. The hardware platform includes a controller that determines the hardware platform lacks functional firmware to boot the primary operating system from the storage device. The controller accesses a firmware image from an external interface that interfaces a device external to the hardware platform, where the external device is a firmware image source. The controller provisions the firmware from the external device to the storage device and initiates a boot sequence from the provisioned firmware.
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