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公开(公告)号:US20210350609A1
公开(公告)日:2021-11-11
申请号:US17223395
申请日:2021-04-06
申请人: Intel Corporation
发明人: Ingo WALD , Gabor LIKTOR , Carsten BENTHIN , Carson BROWNLEE , Johannes GUENTHER , Jefferson D. AMSTUTZ
摘要: An apparatus and method for compressing ray tracing data prior to transmission between nodes. For example, one embodiment of an apparatus comprises: a first node comprising a first ray tracing engine, the first node communicatively coupled to a second node comprising a second ray tracing engine; first compression circuitry coupled to the first ray tracing engine, the first compression circuitry to perform compression on ray tracing data of the first ray tracing engine to produce a first compressed stream of ray tracing data; and interface circuitry to transmit the first compressed stream of ray tracing data from the first node to the second node.
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公开(公告)号:US20210241431A1
公开(公告)日:2021-08-05
申请号:US17171925
申请日:2021-02-09
申请人: Intel Corporation
发明人: Carson BROWNLEE , Ingo WALD , Attila AFRA , Johannes GUENTHER , Jefferson AMSTUTZ , Carsten BENTHIN
摘要: Apparatus and method for denoising of images generated by a rendering engine such as a ray tracing engine. For example, one embodiment of a system or apparatus comprises: A system comprising: a plurality of nodes to perform ray tracing operations; a dispatcher node to dispatch graphics work to the plurality of nodes, each node to perform ray tracing to render a region of an image frame; at least a first node of the plurality comprising: a ray-tracing renderer to perform ray tracing to render a first region of the image frame; and a denoiser to perform denoising of the first region using a combination of data associated with the first region and data associated with a region outside of the first region, at least some of the data associated with the region outside of the first region to be retrieved from at least one other node.
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公开(公告)号:US20200211265A1
公开(公告)日:2020-07-02
申请号:US16236218
申请日:2018-12-28
申请人: Intel Corporation
发明人: Carson BROWNLEE , Joshua BARCZAK , Kai XIAO , Michael APODACA , Philip LAWS , Thomas RAOUX , Travis SCHLUESSLER
摘要: Cloud-based real time rendering. For example, one embodiment of a system comprises: a first graphics processing node to perform a first set of graphics processing operations to render a graphics scene, the first set of graphics processing operations comprising ray-tracing independent operations; an interconnect or network interface coupling the first graphics processing node to a second graphics processing node; the second graphics processing node to receive an indication of a current view of a user of the first graphics processing node and to receive or construct a view-independent surface generated by view-independent ray traversal and intersection operations; the second graphics processing node to responsively perform a view-dependent translation of the view-independent surface based on the current view of the user to generate a view-dependent surface and to provide the view-dependent surface to the first graphics processing node; and the first graphics processing node to perform a second set of graphics processing operations to complete rendering of the graphics scene using the view-dependent surface.
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公开(公告)号:US20230137438A1
公开(公告)日:2023-05-04
申请号:US18090810
申请日:2022-12-29
申请人: INTEL CORPORATION
发明人: Karthik VAIDYANATHAN , Michael APODACA , Thomas RAOUX , Carsten BENTHIN , Kai XIAO , Carson BROWNLEE , Joshua BARCZAK
摘要: An apparatus and method to execute ray tracing instructions. For example, one embodiment of an apparatus comprises execution circuitry to execute a dequantize instruction to convert a plurality of quantized data values to a plurality of dequantized data values, the dequantize instruction including a first source operand to identify a plurality of packed quantized data values in a source register and a destination operand to identify a destination register in which to store a plurality of packed dequantized data values, wherein the execution circuitry is to convert each packed quantized data value in the source register to a floating point value, to multiply the floating point value by a first value to generate a first product and to add the first product to a second value to generate a dequantized data value, and to store the dequantized data value in a packed data element location in the destination register.
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公开(公告)号:US20210012553A1
公开(公告)日:2021-01-14
申请号:US17032964
申请日:2020-09-25
申请人: INTEL CORPORATION
发明人: Michael APODACA , Carsten BENTHIN , Kai XIAO , Carson BROWNLEE , Timothy ROWLEY , Joshua BARCZAK , Travis SCHLUESSLER
IPC分类号: G06T15/06 , G06F16/901 , G06F7/14 , G06F9/38
摘要: Apparatus and method for acceleration data structure refit. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes including inner nodes and leaf nodes stored in a memory in a depth-first search (DFS) order; traversal hardware logic to traverse one or more of the rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node refit unit comprising circuitry and/or logic to read consecutively through at least the inner nodes in the memory in reverse DFS order to perform a bottom-up refit operation on the hierarchical acceleration data structure.
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公开(公告)号:US20220343554A1
公开(公告)日:2022-10-27
申请号:US17740754
申请日:2022-05-10
申请人: INTEL CORPORATION
发明人: Carson BROWNLEE , Carsten BENTHIN , Joshua BARCZAK , Kai XIAO , Michael APODACA , Prasoonkumar SURTI , Thomas RAOUX
摘要: Apparatus and method for context-aware compression. For example, one embodiment of an apparatus comprises: ray traversal/intersection circuitry to traverse rays through a hierarchical acceleration data structure to identify intersections between rays and primitives of a graphics scene; matrix compression circuitry/logic to compress hierarchical transformation matrices to generate compressed hierarchical transformation matrices by quantizing N-bit floating point data elements associated with child transforms of the hierarchical transformation matrices to variable-bit floating point numbers or integers comprising offsets from a parent transform of the child transform; and an instance processor to generate a plurality of instances of one or more base geometric objects in accordance with the compressed hierarchical transformation matrices.
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公开(公告)号:US20210082154A1
公开(公告)日:2021-03-18
申请号:US17003040
申请日:2020-08-26
申请人: INTEL CORPORATION
发明人: Carson BROWNLEE , Carsten BENTHIN , Joshua BARCZAK , Kai XIAO , Michael APODACA , Prasoonkumar SURTI , Thomas RAOUX
摘要: Apparatus and method for context-aware compression. For example, one embodiment of an apparatus comprises: ray traversal/intersection circuitry to traverse rays through a hierarchical acceleration data structure to identify intersections between rays and primitives of a graphics scene; matrix compression circuitry/logic to compress hierarchical transformation matrices to generate compressed hierarchical transformation matrices by quantizing N-bit floating point data elements associated with child transforms of the hierarchical transformation matrices to variable-bit floating point numbers or integers comprising offsets from a parent transform of the child transform; and an instance processor to generate a plurality of instances of one or more base geometric objects in accordance with the compressed hierarchical transformation matrices.
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公开(公告)号:US20210042987A1
公开(公告)日:2021-02-11
申请号:US17079191
申请日:2020-10-23
申请人: INTEL CORPORATION
发明人: Karthik VAIDYANATHAN , Michael APODACA , Thomas RAOUX , Carsten BENTHIN , Kai XIAO , Carson BROWNLEE , Joshua BARCZAK
摘要: An apparatus and method to execute ray tracing instructions. For example, one embodiment of an apparatus comprises execution circuitry to execute a dequantize instruction to convert a plurality of quantized data values to a plurality of dequantized data values, the dequantize instruction including a first source operand to identify a plurality of packed quantized data values in a source register and a destination operand to identify a destination register in which to store a plurality of packed dequantized data values, wherein the execution circuitry is to convert each packed quantized data value in the source register to a floating point value, to multiply the floating point value by a first value to generate a first product and to add the first product to a second value to generate a dequantized data value, and to store the dequantized data value in a packed data element location in the destination register.
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公开(公告)号:US20230162428A1
公开(公告)日:2023-05-25
申请号:US17982766
申请日:2022-11-08
申请人: INTEL CORPORATION
发明人: Michael APODACA , Carsten BENTHIN , Kai XIAO , Carson BROWNLEE , Timothy ROWLEY , Joshua BARCZAK , Travis SCHLUESSLER
IPC分类号: G06T15/06 , G06F16/901 , G06F7/14 , G06F9/38
CPC分类号: G06T15/06 , G06F16/9027 , G06F7/14 , G06F9/3877 , G06N3/02
摘要: Apparatus and method for acceleration data structure refit. For example, one embodiment of an apparatus comprises: a ray generator to generate a plurality of rays in a first graphics scene; a hierarchical acceleration data structure generator to construct an acceleration data structure comprising a plurality of hierarchically arranged nodes including inner nodes and leaf nodes stored in a memory in a depth-first search (DFS) order; traversal hardware logic to traverse one or more of the rays through the acceleration data structure; intersection hardware logic to determine intersections between the one or more rays and one or more primitives within the hierarchical acceleration data structure; a node refit unit comprising circuitry and/or logic to read consecutively through at least the inner nodes in the memory in reverse DFS order to perform a bottom-up refit operation on the hierarchical acceleration data structure.
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公开(公告)号:US20210035349A1
公开(公告)日:2021-02-04
申请号:US16996208
申请日:2020-08-18
申请人: INTEL CORPORATION
发明人: Karthik VAIDYANATHAN , Michael APODACA , Thomas RAOUX , Carsten BENTHIN , Kai XIAO , Carson BROWNLEE , Joshua BARCZAK
摘要: An apparatus and method to execute ray tracing instructions. For example, one embodiment of an apparatus comprises execution circuitry to execute a dequantize instruction to convert a plurality of quantized data values to a plurality of dequantized data values, the dequantize instruction including a first source operand to identify a plurality of packed quantized data values in a source register and a destination operand to identify a destination register in which to store a plurality of packed dequantized data values, wherein the execution circuitry is to convert each packed quantized data value in the source register to a floating point value, to multiply the floating point value by a first value to generate a first product and to add the first product to a second value to generate a dequantized data value, and to store the dequantized data value in a packed data element location in the destination register.
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