公开(公告)号：US20170092996A1

公开(公告)日：2017-03-30

申请号：US14866870

申请日：2015-09-26

Applicant: Intel Corporation

Inventor： JORGE P. RODRIGUEZ ,  ALEXANDER B. UAN-ZO-LI ,  NAOKI MATSUMURA ,  ANDY KEATES ,  JAMES G. HERMERDING, II

IPC: H01M10/48 ,  H02J1/14 ,  G05B15/02

Abstract: Various embodiments may be generally directed to techniques for using an observed battery stress history to manage operation of a computing system component in a high power performance mode when powered by a battery. Various embodiments include techniques for tracking stresses to a battery. Various embodiments include techniques for comparing the battery stress history to a degradation baseline for the battery. Various embodiments include techniques for developing a degradation baseline for a battery including, for example, a degradation baseline based on expected stress to a battery and/or a degradation baseline based on a battery reliability model. Various embodiments include techniques for determining a battery stress surplus or deficit. Various embodiments include techniques for managing operation of a performance enhancing mode or high power performance mode of a computing system component based on the determined battery stress surplus or deficit.

公开(公告)号：US20170351322A1

公开(公告)日：2017-12-07

申请号：US15402114

申请日：2017-01-09

Applicant: INTEL CORPORATION

Inventor： ALEXANDER B. UAN-ZO-LI ,  JORGE P. RODRIGUEZ ,  PHILIP R. LEHWALDER ,  PATRICK K. LEUNG ,  JAMES G. HERMERDING, II ,  VASUDEVAN SRINIVASAN

IPC: G06F1/32 ,  G06F1/28

CPC classification number: G06F1/3296 ,  G06F1/28 ,  G06F1/3212 ,  Y02D10/172 ,  Y02D10/174

Abstract: An apparatus may include first circuitry coupled to one or more platform components, the first circuitry operative to receive an unfiltered input voltage signal, compare a first voltage level of the unfiltered input voltage signal to a first reference voltage level, and generate a control signal operative to lower operation power of one or more of the one or more platform components when the first voltage level is less than the first reference voltage level.

公开(公告)号：US20150277535A1

公开(公告)日：2015-10-01

申请号：US14229864

申请日：2014-03-29

Applicant: Intel Corporation

Inventor： ALEXANDER B. UAN-ZO-LI ,  DON J. NGUYEN ,  GANG JI ,  PHILIP R. LEHWALDER ,  JORGE P. RODRIGUEZ ,  VASUDEVAN SRINIVASAN

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3206 ,  G06F1/3212 ,  G06F1/324 ,  G06F1/3243 ,  Y02D10/126 ,  Y02D10/152 ,  Y02D10/174

Abstract: Methods and apparatus relating to controlling processor slew rates based on battery charge state/level are described. In one embodiment, logic causes modification to a slew rate of a processor based on at least a charge level of a battery pack. Other embodiments are also disclosed and claimed.

Abstract translation: 描述了基于电池充电状态/电平来控制处理器转换速率的方法和装置。 在一个实施例中，逻辑基于至少电池组的充电水平来修改处理器的转换速率。 还公开并要求保护其他实施例。