公开(公告)号：US10656873B2

公开(公告)日：2020-05-19

申请号：US15387097

申请日：2016-12-21

Applicant: Intel Corporation

Inventor： John W. Carroll ,  David Cohen ,  James R. Harris ,  Eric Dahlen

IPC: G06F3/06

Abstract: Technologies for prioritized execution of storage commands by a data storage device include determining a priority of storage commands issued by a host and adding the storage commands to a queue of the data storage device based on the determined priority of the storage command. For example, the storage command issued by the host may be divided into sub-commands and added to a storage sub-command queue of the data storage device based on the determined priority of the storage command. The priority of the storage commands may be determined based on any suitable criteria including, for example, the host storage command queue storing the storage command, metadata associated with the storage command, the type or size of the storage command, and/or other aspects of the storage command, the host, and/or the data storage device.

公开(公告)号：US20170371785A1

公开(公告)日：2017-12-28

申请号：US15195783

申请日：2016-06-28

Applicant: Intel Corporation

Inventor： James A. Boyd ,  John W. Carroll ,  Sanjeev N. Trika ,  Mark A. Schmisseur

IPC: G06F12/0804

CPC classification number: G06F12/0804 ,  G06F12/0868 ,  G06F13/16 ,  G06F2212/1024 ,  G06F2212/7203 ,  Y02D10/13 ,  Y02D10/14

Abstract: Examples include techniques for a write commands to one or more storage devices coupled with a host computing platform. In some examples, the write commands may be responsive to write requests from applications hosted or supported by the host computing platform. A tracking table is utilized by elements of the host computing platform and the one or more storage devices such that the write commands are completed by the one or more storage devices without a need for an interrupt response to elements of the host computing platform.

公开(公告)号：US20160162416A1

公开(公告)日：2016-06-09

申请号：US14564035

申请日：2014-12-08

Applicant: Intel Corporation

Inventor： James A. Boyd ,  Anand S. Ramalingam ,  Pallav H. Gala ,  John W. Carroll ,  Richard P. Mangold

IPC: G06F12/10 ,  G06F13/28

CPC classification number: G06F13/28 ,  G06F12/0246 ,  G06F2212/7201 ,  Y02D10/13 ,  Y02D10/14

Abstract: Described is a system comprising: a storage device; a bus; and a host apparatus including a host memory and a driver module, wherein the host apparatus is coupled to the storage device via the bus, wherein the driver module is operable to: retrieve a logical to physical address mapping from the host memory; and provide the logical to physical address mapping to the storage device via the bus along with a read or write operation request. Described is a method comprising: retrieving a logical to physical address mapping from a host memory; and providing the logical to physical address mapping to a storage device via a bus along with a read or write operation request. Described is a machine readable storage medium having instructions stored thereon that, when executed, cause a machine to perform the method described above.

Abstract translation: 描述了一种系统，包括：存储装置; 一辆公交车; 以及主机设备，包括主机存储器和驱动器模块，其中所述主机设备经由总线耦合到所述存储设备，其中所述驱动器模块可操作以：从所述主机存储器检索逻辑到物理地址映射; 并且通过总线提供与物理地址映射到存储设备的逻辑，以及读或写操作请求。 描述了一种方法，包括：从主机存储器检索逻辑到物理地址映射; 并且通过总线以及读或写操作请求将物理地址映射到物理地址映射到存储设备。 描述了一种其上存储有指令的机器可读存储介质，当被执行时，使机器执行上述方法。

公开(公告)号：US10482010B2

公开(公告)日：2019-11-19

申请号：US15637516

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： James A. Boyd ,  John W. Carroll ,  Sanjeev N. Trika

IPC: G11C7/10 ,  G06F12/02 ,  G06F12/06 ,  G06F13/16

Abstract: An embodiment of a memory apparatus may include a persistent host memory buffer, and a memory controller communicatively coupled to the persistent host memory buffer to control communication between the persistent host memory buffer and a persistent storage media device. Other embodiments are disclosed and claimed.

公开(公告)号：US20190004940A1

公开(公告)日：2019-01-03

申请号：US15637516

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： James A. Boyd ,  John W. Carroll ,  Sanjeev N. Trika

IPC: G06F12/02 ,  G06F13/16 ,  G11C7/10 ,  G06F12/06

CPC classification number: G06F12/0246 ,  G06F12/0623 ,  G06F13/1673 ,  G06F13/1689 ,  G06F13/1694 ,  G06F2212/1024 ,  G06F2212/7203 ,  G11C7/1006

Abstract: An embodiment of a memory apparatus may include a persistent host memory buffer, and a memory controller communicatively coupled to the persistent host memory buffer to control communication between the persistent host memory buffer and a persistent storage media device. Other embodiments are disclosed and claimed.