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公开(公告)号:US11681463B2
公开(公告)日:2023-06-20
申请号:US17350574
申请日:2021-06-17
申请人: Intel Corporation
发明人: Peng Li , Jawad B. Khan , Sanjeev N. Trika
IPC分类号: G06F3/06 , G06F12/1081 , G06F12/1009
CPC分类号: G06F3/0658 , G06F3/064 , G06F3/0613 , G06F3/0679 , G06F12/1081 , G06F12/1009
摘要: A host-managed storage device includes an offload capability that enables the host to offload all or a portion of a defrag operation to the storage device. Rather than issuing read, write or copy operations and commands to relocate data to the host's DRAM, the host assembles a defrag operation command descriptor for the storage device controller. The command descriptor includes a defrag bitmap that can be directly accessed by the storage device controller to conduct the defrag operation entirely on the storage device at band granularity, without consuming host CPU cycles or host memory. The reduction in host operations/commands achieved by offloading defragmentation to the storage device is on the order of at least a thousand-fold reduction.
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公开(公告)号:US11573895B2
公开(公告)日:2023-02-07
申请号:US17220842
申请日:2021-04-01
申请人: Intel Corporation
发明人: Peng Li , Jawad B. Khan , Sanjeev N. Trika
IPC分类号: G06F12/06 , G11C7/10 , G05B19/045 , G06F3/06
摘要: An embodiment of a semiconductor package apparatus may include technology to provide a first interface between a first storage device and a host device, and provide a second interface directly between the first storage device and a second storage device. Other embodiments are disclosed and claimed.
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公开(公告)号:US10915267B2
公开(公告)日:2021-02-09
申请号:US15833955
申请日:2017-12-06
申请人: Intel Corporation
发明人: Sanjeev N. Trika , Peng Li , Jawad B. Khan , Myron Loewen
摘要: Examples include techniques for implementing a write transaction to two or more memory devices in a storage device. In some examples, the write transaction includes an atomic write transaction from an application or operating system executing on a computing platform to a storage device coupled with the computing platform. For these examples, the storage device includes a storage controller to receive an atomic multimedia write transaction request to write first data and second data; cause the first data to be stored in a first memory device, and cause the second data to be stored in a second memory device, simultaneously and atomically.
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4.
公开(公告)号:US10747439B2
公开(公告)日:2020-08-18
申请号:US15910476
申请日:2018-03-02
申请人: Intel Corporation
发明人: Rowel S. Garcia , Sanjeev N. Trika , Jawad B. Khan
摘要: Power-fail safe compression and dynamic capacity for a storage device in a computer system is provided. Metadata stored with each logical block in non-volatile memory in the storage device ensures that the mapping table may be recovered and stored in volatile memory for use by the computer system after power is restored to the computer system. In addition, the metadata ensures that a list of free logical block addresses written to the storage device prior to shutting down the computer system to provide access to the additional capacity that is available in the storage device by storing compressed data in the storage device may also be recovered.
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公开(公告)号:US10685097B2
公开(公告)日:2020-06-16
申请号:US15858768
申请日:2017-12-29
申请人: Intel Corporation
摘要: An embodiment of a semiconductor apparatus may include technology to receive an application-related checkpoint request corresponding to a file of a file system stored on a persistent storage media, and determine one or more checkpoint operations internal to the persistent storage media to perform the application-related checkpoint request. Other embodiments are disclosed and claimed.
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公开(公告)号:US20190102293A1
公开(公告)日:2019-04-04
申请号:US15721547
申请日:2017-09-29
申请人: Intel Corporation
发明人: Peng Li , Jawad B. Khan , Sanjeev N. Trika
IPC分类号: G06F12/06 , G05B19/045 , G11C7/10
CPC分类号: G06F12/0692 , G05B19/045 , G11C7/1006
摘要: An embodiment of a semiconductor package apparatus may include technology to provide a first interface between a first storage device and a host device, and provide a second interface directly between the first storage device and a second storage device. Other embodiments are disclosed and claimed.
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公开(公告)号:US10216445B2
公开(公告)日:2019-02-26
申请号:US15639450
申请日:2017-06-30
申请人: Intel Corporation
发明人: Peng Li , Jawad B. Khan , Sanjeev N. Trika , Vinodh Gopal
IPC分类号: G06F3/06
摘要: One embodiment provides an apparatus. The apparatus include a device storage logic. The device storage logic is to determine a key-based pointer based, at least in part, on a key included in an input key-value (KV) pair received from a host device and to determine whether a unique input KV data block included in the input KV pair is duplicated in a nonvolatile memory circuitry of a storage device. The device storage logic is further to set a descriptor pointer associated with the unique input KV data block to point to a physical nonvolatile memory (NVM) address associated with an existing unique data block and increment a first reference count associated with the existing unique data block, if the unique input KV data block is a duplicate of the existing unique data block, or store the input KV data block to a physical NVM location associated with a selected physical NVM address, set the descriptor pointer to point to the selected physical NVM address and set a second reference count associated with the selected physical NVM address to one, if the unique input KV data block is not duplicated in the NVM circuitry.
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公开(公告)号:US10203888B2
公开(公告)日:2019-02-12
申请号:US14975150
申请日:2015-12-18
申请人: Intel Corporation
摘要: Technologies for performing a data copy operation on a data storage device include storing a copy token in a power-fail-safe data structure that identifies the source address and destination address of the data copy operation, updating an address table to indicate that the source and destination addresses are involved in the data copy operation, and notifying a host requesting that data copy operation that the data copy operation has been completed prior to performing the data copy operation. The host may subsequently perform other tasks while the data storage device completes the data copy operation. During the data copy operation, data access requests to the source or destination addresses are blocked based on the address table. Additionally, should a power failure event occur, the power-fail-safe data structure is saved to non-volatile data storage so that the copy operation may be completed upon the next power-on event of the data storage device.
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9.
公开(公告)号:US10146440B2
公开(公告)日:2018-12-04
申请号:US15385791
申请日:2016-12-20
申请人: INTEL CORPORATION
发明人: Peng Li , Anand S. Ramalingam , Jawad B. Khan , William K. Lui , Divya Narayanan , Sanjeev N. Trika
IPC分类号: G06F3/06
摘要: Provided are an apparatus, system and method for offloading collision check operations in a memory storage device to a collision check unit. A collision check unit includes a collision table including logical addresses for pending Input/Output (I/O) requests. An I/O request is received to a target logical address addressing a block of data in the non-volatile memory. The logical address is sent to the collision check unit. Resources to transfer data with respect to the transfer buffer to data for the I/O request are allocated in parallel while the collision check unit is determining whether the collision table includes the target logical address. The collision check unit determines whether the collision table includes the target logical address and returns indication of whether the collision table includes the target logical address indicating that current data for the target logical address is already in the transfer buffer.
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公开(公告)号:US20170161198A1
公开(公告)日:2017-06-08
申请号:US15338199
申请日:2016-10-28
申请人: INTEL CORPORATION
发明人: Sanjeev N. Trika
IPC分类号: G06F12/0871 , G06F12/0868 , G06F12/0804
CPC分类号: G06F12/0871 , G06F11/1441 , G06F12/0246 , G06F12/0804 , G06F12/0815 , G06F12/0866 , G06F12/0868 , G06F2212/1032 , G06F2212/222 , G06F2212/601
摘要: A method and system to allow power fail-safe write-back or write-through caching of data in a persistent storage device into one or more cache lines of a caching device. No metadata associated with any of the cache lines is written atomically into the caching device when the data in the storage device is cached. As such, specialized cache hardware to allow atomic writing of metadata during the caching of data is not required.
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