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公开(公告)号：US10824764B2
公开(公告)日：2020-11-03
申请号：US16020918
申请日：2018-06-27
Applicant: Intel Corporation
Inventor： Nasser Kurd , Praveen Mosalikanti , Thripthi Hegde , Mark Neidengard , Vaughn Grossnickle , Qi S. Wang , Kandadai Ramesh
Abstract: An apparatus is provided for autonomous security and functional safety (FUSA) of clock and voltages. The apparatus may include: a multiplexer having a first input communicatively coupled to a pin to receive a first clock external to a die, and a second input coupled to an output of a divider; an oscillator to provide a second clock; and a counter coupled to an output of the multiplexer and the oscillator, wherein the counter is to operate with the second clock and is to determine a frequency of the first clock. The apparatus may further include a voltage monitor circuitry for monitoring voltage(s) for FUSA, a reference generator for FUSA, a duty cycle monitor for FUSA, a frequency degradation monitor for FUSA, and a phase error degradation monitor for FUSA.
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公开(公告)号：US20200004990A1
公开(公告)日：2020-01-02
申请号：US16020918
申请日：2018-06-27
Applicant: Intel Corporation
Inventor： Nasser Kurd , Praveen Mosalikanti , Thripthi Hegde , Mark Neidengard , Vaughn Grossnickle , Qi S. Wang , Kandadai Ramesh
Abstract: An apparatus is provided for autonomous security and functional safety (FUSA) of clock and voltages. The apparatus may include: a multiplexer having a first input communicatively coupled to a pin to receive a first clock external to a die, and a second input coupled to an output of a divider; an oscillator to provide a second clock; and a counter coupled to an output of the multiplexer and the oscillator, wherein the counter is to operate with the second clock and is to determine a frequency of the first clock. The apparatus may further include a voltage monitor circuitry for monitoring voltage(s) for FUSA, a reference generator for FUSA, a duty cycle monitor for FUSA, a frequency degradation monitor for FUSA, and a phase error degradation monitor for FUSA.
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公开(公告)号：US11461504B2
公开(公告)日：2022-10-04
申请号：US17087414
申请日：2020-11-02
Applicant: Intel Corporation
Inventor： Nasser Kurd , Praveen Mosalikanti , Thripthi Hegde , Mark Neidengard , Vaughn Grossnickle , Qi S. Wang , Kandadai Ramesh
Abstract: An apparatus is provided for autonomous security and functional safety (FUSA) of clock and voltages. The apparatus may include: a multiplexer having a first input communicatively coupled to a pin to receive a first clock external to a die, and a second input coupled to an output of a divider; an oscillator to provide a second clock; and a counter coupled to an output of the multiplexer and the oscillator, wherein the counter is to operate with the second clock and is to determine a frequency of the first clock. The apparatus may further include a voltage monitor circuitry for monitoring voltage(s) for FUSA, a reference generator for FUSA, a duty cycle monitor for FUSA, a frequency degradation monitor for FUSA, and a phase error degradation monitor for FUSA.
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公开(公告)号：US20210049307A1
公开(公告)日：2021-02-18
申请号：US17087414
申请日：2020-11-02
Applicant: Intel Corporation
Inventor： Nasser Kurd , Praveen Mosalikanti , Thripthi Hegde , Mark Neidengard , Vaughn Grossnickle , Qi S. Wang , Kandadai Ramesh
Abstract: An apparatus is provided for autonomous security and functional safety (FUSA) of clock and voltages. The apparatus may include: a multiplexer having a first input communicatively coupled to a pin to receive a first clock external to a die, and a second input coupled to an output of a divider; an oscillator to provide a second clock; and a counter coupled to an output of the multiplexer and the oscillator, wherein the counter is to operate with the second clock and is to determine a frequency of the first clock. The apparatus may further include a voltage monitor circuitry for monitoring voltage(s) for FUSA, a reference generator for FUSA, a duty cycle monitor for FUSA, a frequency degradation monitor for FUSA, and a phase error degradation monitor for FUSA.
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