公开(公告)号：US20190042497A1

公开(公告)日：2019-02-07

申请号：US15970639

申请日：2018-05-03

Applicant: Intel Corporation

Inventor： Rajesh BHASKAR ,  Kenneth FOUST ,  George VERGIS

IPC: G06F13/16 ,  G06F13/40 ,  G06F1/18 ,  G06F13/42 ,  H01R12/72 ,  G11C5/02

Abstract: An apparatus is described. The apparatus includes a DIMM hub circuit. The DIMM hub circuit includes first bus interface circuitry, control circuitry and second bus interface circuitry. The first bus interface circuitry is to receive header information and payload information from a host. The control circuitry is to process the header information and recognize that the payload is to be passed to a target component that is coupled to the DIMM hub circuit through a second bus that is a same type of bus as the first bus. The second bus interface circuitry to send the payload information over the second bus to the target component, wherein, the payload information is to include embedded header information to be processed by the target component.

公开(公告)号：US20240106126A1

公开(公告)日：2024-03-28

申请号：US18352296

申请日：2023-07-14

Applicant: Intel Corporation

Inventor： Zhen ZHOU ,  Tolga ACIKALIN ,  Kenneth FOUST ,  Shuhei YAMADA ,  Tae Young YANG ,  Timothy F. COX ,  Renzhi LIU ,  Richard DORRANCE ,  Johanny ESCOBAR PELAEZ

IPC: H01Q9/04 ,  H01Q1/22

CPC classification number: H01Q9/0414 ,  H01Q1/2283 ,  H01Q9/045

Abstract: A communication system, including a first carrier and a first antenna mounted on the first carrier; a second carrier and a second antenna mounted on the second carrier, wherein the first antenna and the second antenna are arranged relative to each other that the first antenna and the second antenna can establish wireless link; a third carrier and a third antenna mounted on the third carrier; a fourth carrier and a fourth antenna mounted on the fourth carrier, wherein the third antenna and the fourth antenna are arranged relative to each other that the third antenna and the fourth antenna can establish wireless link; and a transmission structure, within which the signal propagate through, connects the second antenna and the third antenna.

公开(公告)号：US20210224206A1

公开(公告)日：2021-07-22

申请号：US17222760

申请日：2021-04-05

Applicant: Intel Corporation

Inventor： Rajesh BHASKAR ,  Kenneth FOUST ,  George VERGIS

IPC: G06F13/16 ,  G06F13/40 ,  G11C5/02 ,  G06F13/42 ,  G06F1/18 ,  G11C7/10

Abstract: An apparatus is described. The apparatus includes a DIMM hub circuit. The DIMM hub circuit includes first bus interface circuitry, control circuitry and second bus interface circuitry. The first bus interface circuitry is to receive header information and payload information from a host. The control circuitry is to process the header information and recognize that the payload is to be passed to a target component that is coupled to the DIMM hub circuit through a second bus that is a same type of bus as the first bus. The second bus interface circuitry to send the payload information over the second bus to the target component, wherein, the payload information is to include embedded header information to be processed by the target component.