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    WIRELESS COMMUNICATION WITHIN A CONTROL PLANE AND A DATA PLANE
    3.
    发明申请
    WIRELESS COMMUNICATION WITHIN A CONTROL PLANE AND A DATA PLANE 有权

    公开(公告)号：US20220200776A1

    公开(公告)日：2022-06-23

    申请号：US17131862

    申请日：2020-12-23

    Applicant: Intel Corporation

    Inventor： Brent R. CARLTON ,  Richard DORRANCE ,  Kenneth P. FOUST ,  Asma Beevi KURIPARAMBIL THEKKUMPATE ,  Renzhi LIU ,  Rinkle JAIN

    IPC: H04L5/14 ,  H04W52/02 ,  H04W74/00 ,  H04L25/03 ,  H04B1/44

    Abstract: A transceiver may include a transmitter device, a receiver device, a secondary receiver device, and switching elements. The transmitter device may provide a transmit control signal on first and second channels. The receiver device may receive a receive control signal on the first and second channels. The secondary receiver device may monitor occupation of the first and second channels without decoding at least a portion of control signals concurrent with the receiver device receiving the receive control signal. The switching elements may control when the transmitter device provides the transmit control signal to one of and is electrically isolated from first and second antennas, the receiver device receives the receive control signal from one of and is electrically isolated from the first and second antennas, and the secondary receiver device monitors occupation of one of the first and second channels and is electrically isolated from the first and second antennas.

    PACKAGE INTEGRATED MULTIBAND AND POLARIZATION DIVERSIFIED MODE RECONFIGURABLE ANTENNA SYSTEM FOR ROBUST WIRELESS CHIP TO CHIP COMMUNICATION
    6.
    发明公开
    PACKAGE INTEGRATED MULTIBAND AND POLARIZATION DIVERSIFIED MODE RECONFIGURABLE ANTENNA SYSTEM FOR ROBUST WIRELESS CHIP TO CHIP COMMUNICATION 审中-公开

    公开(公告)号：US20240113438A1

    公开(公告)日：2024-04-04

    申请号：US17955551

    申请日：2022-09-29

    Applicant: Intel Corporation

    Inventor： Zhen ZHOU ,  Shuhei YAMADA ,  Renzhi LIU ,  Tae Young YANG ,  Tolga ACIKALIN ,  Kenneth P. FOUST

    IPC: H01Q9/16

    CPC classification number: H01Q9/16

    Abstract: A package-to-package communication system is provided including a first package having integrated on a first substrate a first antenna, a second antenna, and a first transceiver coupled to the first antenna and the second antenna. The first antenna is arranged along a first edge of the first substrate. The second antenna is arranged along a second edge of the first substrate. A second package having integrated on a second substrate a third antenna, a fourth antenna and a second transceiver coupled to the third antenna and the fourth antenna. The third antenna is arranged along a third edge of the second substrate. The fourth antenna is arranged along a fourth edge of the second substrate. The first antenna and the third antenna are configured to communicate signals of a vertical polarization. The second antenna and the fourth antenna are configured to communicate signals of a horizontal polarization.

    IN-MEMORY ANALOG CHANNEL EQUALIZATION
    8.
    发明公开
    IN-MEMORY ANALOG CHANNEL EQUALIZATION 审中-公开

    公开(公告)号：US20240113698A1

    公开(公告)日：2024-04-04

    申请号：US17956844

    申请日：2022-09-30

    Applicant: Intel Corporation

    Inventor： Richard DORRANCE ,  Peter SAGAZIO ,  Renzhi LIU ,  Hechen WANG ,  Deepak DASALUKUNTE ,  Brent R. CARLTON

    IPC: H03H17/02

    CPC classification number: H03H17/02 ,  H03H2218/10

    Abstract: A radiofrequency frontend device includes a memory array, which includes a plurality of input lines; a plurality of output lines; and a plurality of impedance devices, each impedance device connecting an input line of the plurality of input lines to an output line of the plurality of output lines, wherein each impedance represents a filter coefficient; wherein the radiofrequency frontend device is configured to provide at each input line of the plurality of input lines a sampled voltage of an analog electric signal, each sampled voltage corresponding to a voltage of the analog electric signal during a respective time period of a plurality of time periods; and when the memory array receives the sampled voltages, the memory array is configured to modify each of the sampled voltages by a respective impedance device of the plurality of impedance devices and sum the modified sampled voltages.

    PACKAGE SYSTEM AND PACKAGE
    10.
    发明申请
    PACKAGE SYSTEM AND PACKAGE 有权

    公开(公告)号：US20220199556A1

    公开(公告)日：2022-06-23

    申请号：US17131863

    申请日：2020-12-23

    Applicant: Intel Corporation

    Inventor： Zhen ZHOU ,  Tae Young YANG ,  Tolga ACIKALIN ,  Johanny ESCOBAR PELAEZ ,  Kenneth P. FOUST ,  Chia-Pin CHIU ,  Renzhi LIU ,  Cheng-Yuan CHIN

    IPC: H01L23/66 ,  H01L29/93 ,  H01L23/14 ,  H01Q15/00 ,  H01Q1/42 ,  H01Q15/14 ,  H01Q1/22

    Abstract: In various aspects, a package system includes at least a first package and a second package arranged on a same side of the package carrier. Each of the first package and the second package comprises an antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first package and the second package at the same side of the package carrier as the first package and the second package. The cover comprises at least one conductive element forming a predefined pattern on a side of the cover facing the first package and the second package. The predefined pattern is configured as a frequency selective surface. The package system further includes a radio frequency signal interface wirelessly connecting the antennas of the first package and the second package. The radio frequency signal interface comprises the at least one conductive element.

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