公开(公告)号：US10457548B2

公开(公告)日：2019-10-29

申请号：US15573342

申请日：2015-06-22

Applicant: Intel Corporation

Inventor： Kevin Lai Lin ,  Chytra Pawashe ,  Raseong Kim ,  Ian A. Young ,  Kanwal Jit Singh ,  Robert L. Bristol

IPC: B81B7/00 ,  B81C1/00 ,  H01L21/768

Abstract: A conductive layer is deposited into a trench in a sacrificial layer on a substrate. An etch stop layer is deposited over the conductive layer. The sacrificial layer is removed to form a gap. In one embodiment, a beam is over a substrate. An interconnect is on the beam. An etch stop layer is over the beam. A gap is between the beam and the etch stop layer.

公开(公告)号：US11646266B2

公开(公告)日：2023-05-09

申请号：US16535539

申请日：2019-08-08

Applicant: INTEL CORPORATION

Inventor： Kevin Lai Lin ,  Miriam Ruth Reshotko ,  Nafees Aminul Kabir

IPC: H01L23/528 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L23/5283 ,  H01L23/5226 ,  H01L23/53295

Abstract: Interconnect structures are disclosed. An example includes conductive traces over a first dielectric layer, dielectric helmet structures over top surfaces of the conductive traces, and a second dielectric layer over the helmet structures. Spaces between adjacent ones of conductive traces are devoid of material. A bottom surface of the second dielectric layer is between top surfaces of the dielectric structures and bottom surfaces of the helmet structures, or co-planar with the top surface of the helmet structures, but the airgap extends above tops of the conductive traces. Another example includes a dielectric adjacent to upper sections but not lower sections of conductive traces, so as to provide airgaps between adjacent lower sections. Alternatively, a first dielectric material is adjacent the upper sections and a second compositionally different dielectric material is adjacent the lower sections. In either case, the sidewalls of the upper sections of the interconnect features may include scalloping.

公开(公告)号：US11664305B2

公开(公告)日：2023-05-30

申请号：US16455662

申请日：2019-06-27

Applicant: Intel Corporation

Inventor： Kevin Lai Lin ,  Manish Chandhok ,  Miriam Reshotko ,  Christopher Jezewski ,  Eungnak Han ,  Gurpreet Singh ,  Sarah Atanasov ,  Ian A. Young

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/5222 ,  H01L21/76802 ,  H01L23/528 ,  H01L23/5226

Abstract: An interconnect structure is disclosed. The interconnect structure includes a first line of interconnects and a second line of interconnects. The first line of interconnects and the second line of interconnects are staggered. The individual interconnects of the second line of interconnects are laterally offset from individual interconnects of the first line of interconnects. A dielectric material is adjacent to at least a portion of the individual interconnects of at least one of the first line of interconnects and the second line of interconnects.

公开(公告)号：US20210043565A1

公开(公告)日：2021-02-11

申请号：US16535539

申请日：2019-08-08

Applicant: INTEL CORPORATION

Inventor： Kevin Lai Lin ,  Miriam Ruth Reshotko ,  Nafees Aminul Kabir

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L21/311

Abstract: Interconnect structures are disclosed. An example includes conductive traces over a first dielectric layer, dielectric helmet structures over top surfaces of the conductive traces, and a second dielectric layer over the helmet structures. Spaces between adjacent ones of conductive traces are devoid of material. A bottom surface of the second dielectric layer is between top surfaces of the dielectric structures and bottom surfaces of the helmet structures, or co-planar with the top surface of the helmet structures, but the airgap extends above tops of the conductive traces. Another example includes a dielectric adjacent to upper sections but not lower sections of conductive traces, so as to provide airgaps between adjacent lower sections. Alternatively, a first dielectric material is adjacent the upper sections and a second compositionally different dielectric material is adjacent the lower sections. In either case, the sidewalls of the upper sections of the interconnect features may include scalloping.