利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

41 条记录 (耗时 0.02 秒)

    Differential hardmasks for modulation of electrobucket sensitivity
    2.
    发明授权
    Differential hardmasks for modulation of electrobucket sensitivity 有权

    公开(公告)号：US11251072B2

    公开(公告)日：2022-02-15

    申请号：US16346305

    申请日：2016-12-23

    申请人： Intel Corporation

    发明人： Kevin L. Lin ,  Robert L. Bristol ,  James M. Blackwell ,  Rami Hourani ,  Marie Krysak

    IPC分类号： H01L23/522 ,  H01L21/768 ,  H01L21/027 ,  H01L21/311

    摘要： Approaches based on differential hardmasks for modulation of electrobucket sensitivity for semiconductor structure fabrication, and the resulting structures, are described. In an example, a method of fabricating an interconnect structure for an integrated circuit includes forming a hardmask layer above an inter-layer dielectric (ILD) layer formed above a substrate. A plurality of dielectric spacers is formed on the hardmask layer. The hardmask layer is patterned to form a plurality of first hardmask portions. A plurality of second hardmask portions is formed alternating with the first hardmask portions. A plurality of electrobuckets is formed on the alternating first and second hardmask portions and in openings between the plurality of dielectric spacers. Select ones of the plurality of electrobuckets are exposed to a lithographic exposure and removed to define a set of via locations.

    Structure and method to self align via to top and bottom of tight pitch metal interconnect layers
    4.
    发明授权
    Structure and method to self align via to top and bottom of tight pitch metal interconnect layers 有权

    公开(公告)号：US10553532B2

    公开(公告)日：2020-02-04

    申请号：US15529484

    申请日：2014-12-24

    申请人： INTEL CORPORATION

    发明人： Richard E. Schenker ,  Manish Chandhok ,  Robert L. Bristol ,  Mauro J. Kobrinsky ,  Kevin Lin

    IPC分类号： H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L21/033 ,  H01L21/311 ,  H01L23/532

    摘要： Embodiments of the invention include interconnect structures with overhead vias and through vias that are self-aligned with interconnect lines and methods of forming such structures. In an embodiment, an interconnect structure is formed in an interlayer dielectric (ILD). One or more first interconnect lines may be formed in the ILD. The interconnect structure may also include one or more second interconnect lines in the ILD that arranged in an alternating pattern with the first interconnect lines. Top surfaces of each of the first and second interconnect lines may be recessed below a top surface of the ILD. The interconnect structure may include a self-aligned overhead via formed over one or more of the first interconnect lines or over one or more of the second interconnect lines. In an embodiment, a top surface of the self-aligned overhead via is substantially coplanar with a top surface of the ILD.