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公开(公告)号:US20190252033A1
公开(公告)日:2019-08-15
申请号:US16168809
申请日:2018-10-23
Applicant: Intel Corporation
Inventor: Varsha REGULAPATI , Heonwook KIM , Aliasgar S. MADRASWALA , Naga Kiranmayee UPADHYAYULA , Purval S. SULE , Jong Tai PARK , Sriram BALASUBRAHMANYAM , Manjiri M. KATMORE
CPC classification number: G11C29/023 , G06F12/0246 , G06F13/1668 , G11C16/0483 , G11C16/32 , G11C29/028
Abstract: In connection with data pin timing calibration with a strobe signal, examples provide for determination of pass/fail status of a pin from multiple pass/fail results in a single operation. Determination of pass/fail results for multiple pins based on multiple applied trim offsets can be made in parallel. Accordingly, a time to determine pass/fail results from multiple trim values for a pin can be reduced, which can enable faster power-up of NAND flash devices.