公开(公告)号：US20170040263A1

公开(公告)日：2017-02-09

申请号：US15332199

申请日：2016-10-24

申请人： Intel Corporation

发明人： Ruth A. Brain ,  Kevin J. Fischer ,  Michael A. Childs

IPC分类号： H01L23/532 ,  H01L23/528 ,  H01L23/522

CPC分类号： H01L23/5329 ,  H01L21/311 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76807 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask including a dielectric material on a surface of the dielectric layer; and forming at least one via in the dielectric layer to the contact point using the hardmask as a pattern. An apparatus including a circuit substrate including at least one active layer including a contact point; a dielectric layer on the at least one active layer; a hardmask including a dielectric material having a least one opening therein for an interconnect material; and an interconnect material in the at least one opening of the hardmask and through the dielectric layer to the contact point.

摘要翻译： 一种包括在集成电路结构的接触点上形成介电层的方法; 在所述电介质层的表面上形成包括电介质材料的硬掩模; 以及使用所述硬掩模作为图案在所述电介质层中形成至少一个通孔到所述接触点。 一种包括电路基板的装置，包括至少一个包括接触点的活性层; 所述至少一个有源层上的介电层; 包括其中具有用于互连材料的至少一个开口的电介质材料的硬掩模; 以及在硬掩模的至少一个开口中并通过介电层到接触点的互连材料。

公开(公告)号：US10593626B2

公开(公告)日：2020-03-17

申请号：US15723083

申请日：2017-10-02

申请人： Intel Corporation

发明人： Ruth A. Brain ,  Kevin J. Fischer ,  Michael A. Childs

IPC分类号： H01L23/532 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L21/311

摘要： A method including forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask including a dielectric material on a surface of the dielectric layer; and forming at least one via in the dielectric layer to the contact point using the hardmask as a pattern. An apparatus including a circuit substrate including at least one active layer including a contact point; a dielectric layer on the at least one active layer; a hardmask including a dielectric material having a least one opening therein for an interconnect material; and an interconnect material in the at least one opening of the hardmask and through the dielectric layer to the contact point.

公开(公告)号：US09780038B2

公开(公告)日：2017-10-03

申请号：US15332199

申请日：2016-10-24

申请人： Intel Corporation

发明人： Ruth A. Brain ,  Kevin J. Fischer ,  Michael A. Childs

IPC分类号： H01L23/00 ,  H01L23/532 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528 ,  H01L21/311

CPC分类号： H01L23/5329 ,  H01L21/311 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76807 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask including a dielectric material on a surface of the dielectric layer; and forming at least one via in the dielectric layer to the contact point using the hardmask as a pattern. An apparatus including a circuit substrate including at least one active layer including a contact point; a dielectric layer on the at least one active layer; a hardmask including a dielectric material having a least one opening therein for an interconnect material; and an interconnect material in the at least one opening of the hardmask and through the dielectric layer to the contact point.