公开(公告)号：US11158194B2

公开(公告)日：2021-10-26

申请号：US16370247

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Kathiravetpillai Sivanesan ,  Yaser Fouad ,  Vesh Raj Sharma Banjade ,  Satish Jha ,  Sami Mumtaz

IPC: G08G1/00 ,  G05D1/02 ,  H04W4/08 ,  H04W76/14 ,  H04W4/46 ,  H04W84/00

Abstract: Technologies for facilitating vehicle-to-vehicle (V2V) communications includes an on-board vehicle control system of an autonomous vehicle configured to identify one or more autonomous vehicles with which to communicate and transmit a communication frame usable to indicate that the autonomous vehicle intends to join a cluster of autonomous vehicles defined by the one or more autonomous vehicles. The communication frame includes a structure having a contention channel, a control channel, and a data channel, which are used to communicate requests, intentions, and/or data.

公开(公告)号：US10218386B1

公开(公告)日：2019-02-26

申请号：US15359548

申请日：2016-11-22

Applicant: Intel Corporation

Inventor： Martin Langhammer ,  Simon Finn ,  Sami Mumtaz

IPC: H03M13/00 ,  H03M13/15

Abstract: A Reed-Solomon encoder that supports multiple code words is provided. The encoder circuit may include partial syndrome calculation circuitry, three matrix multiplication circuits, and two adder circuits. The partial syndrome calculation circuitry may receive a message and generate partial syndromes. The first matrix multiplication circuit may multiply a lower portion of the partial syndromes by a small Lagrange matrix to produce a small parity symbol vector. The second matrix multiplication circuit may multiply the small parity symbol vector by a Vandermonde matrix to produce a product vector. The first adder circuit may add the product vector to an upper portion of the partial syndromes to produce a sum vector. The third matrix multiplication circuit may multiply the sum vector by a large Lagrange matrix to produce a large product vector. The large product vector may be selectively combined with the small parity symbol vector to generate final parity check symbols.

公开(公告)号：US20210174122A1

公开(公告)日：2021-06-10

申请号：US17125360

申请日：2020-12-17

Applicant: Intel Corporation

Inventor： Leobardo Campos Macias ,  German Fabila Garcia ,  David Gomez Gutierrez ,  Sundar Krishnamurthy ,  Le Liang ,  Lu Lu ,  Paulino De Jesus Mendoza Valencia ,  Sami Mumtaz ,  Julio Zamora Esquivel ,  Jose Rodrigo Camacho Perez

IPC: G06K9/46 ,  G06N7/00 ,  G06K9/00

Abstract: Techniques are disclosed for the acceleration of the operation of a probabilistic sampling device for applications including homography estimation and wireless signal detection, which may include reducing the number of iterations associated with probabilistic sampling. Techniques are also disclosed for corner feature extraction from event-based cameras, which may be implemented via an Advanced Driver Assistance System (ADAS) or Autonomous Driving (AD) system.

公开(公告)号：US20190251848A1

公开(公告)日：2019-08-15

申请号：US16370247

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Kathiravetpillai Sivanesan ,  Yaser Fouad ,  Vesh Raj Sharma Banjade ,  Satish Jha ,  Sami Mumtaz

IPC: G08G1/00 ,  G05D1/02 ,  H04W4/46 ,  H04W4/08 ,  H04W76/14

CPC classification number: G08G1/22 ,  G05D1/0293 ,  G05D2201/0213 ,  H04W4/08 ,  H04W4/46 ,  H04W76/14

Abstract: Technologies for facilitating vehicle-to-vehicle (V2V) communications includes an on-board vehicle control system of an autonomous vehicle configured to identify one or more autonomous vehicles with which to communicate and transmit a communication frame usable to indicate that the autonomous vehicle intends to join a cluster of autonomous vehicles defined by the one or more autonomous vehicles. The communication frame includes a structure having a contention channel, a control channel, and a data channel, which are used to communicate requests, intentions, and/or data.

公开(公告)号：US10164660B1

公开(公告)日：2018-12-25

申请号：US15390352

申请日：2016-12-23

Applicant: Intel Corporation

Inventor： Simon Finn ,  Martin Langhammer ,  Sami Mumtaz

IPC: G11C29/00 ,  H03M13/15 ,  G06F11/10 ,  G11C29/52 ,  H03M13/00

Abstract: An integrated circuit may include a Reed-Solomon decoder that receives a transmitted code word and an associated bit mask and that generates a corresponding corrected message. The bit mask indicates an erasure pattern for the received code word. The Reed-Solomon decoder may include a syndrome generator, a multiplication circuit, a read-only memory (ROM) circuit, an address compressor, and an aggregation circuit. The syndrome generator may receive the transmitted code word and generate a corresponding syndrome. The address compressor may receive the bit mask and generate a corresponding unique address for accessing the ROM circuit. The ROM circuit may then output an inverse parity matrix based on the unique address. The multiplication circuit may multiply the syndrome by the retrieved inverse parity matrix to output corrected symbols. The aggregation circuit may then path the received code word with the corrected symbols to obtain the corrected message.